Pull up following revision(s) (requested by maxv in ticket #1077):

sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.68
sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.74
sys/dev/nvmm/x86/nvmm_x86.c: revision 1.16

Improve emulation of MSR_IA32_ARCH_CAPABILITIES: publish only the *_NO
bits. Initially they were the only ones there, but Intel then added other
bits we aren't interested in, and they must be filtered out.

nvmm-x86-svm: improve the handling of MSR_EFER

Intercept reads of it as well, just to mask EFER_SVME, which the guest
doesn't need to see.

nvmm-x86: improve the CPUID emulation

- Mask DTES64, DS_CPL, CID, SDBG, xTPR, PN.
- B10, B20 and IA64 do not exist, so just remove them.

(martin)