 @@ -1,14 +1,14 @@
-/*	$NetBSD: machdep.c,v 1.15 2009/03/18 16:00:12 cegger Exp $	*/
+/*	$NetBSD: machdep.c,v 1.16 2009/07/20 05:10:49 kiyohara Exp $	*/
 /*-
  * Copyright (c) 2003,2004 Marcel Moolenaar
  * Copyright (c) 2000,2001 Doug Rabson
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
 @@ -52,54 +52,54 @@
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
  * All rights reserved.
+ *
  * Author: Chris G. Demetriou
+ *
  * Permission to use, copy, modify and distribute this software and
  * its documentation is hereby granted, provided that both the copyright
  * notice and this permission notice appear in all copies of the
  * software, derivative works or modified versions, and any portions
  * thereof, and that both notices appear in supporting documentation.
+ *
  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
  * Carnegie Mellon requests users of this software to return to
+ *
  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
  *  School of Computer Science
  *  Carnegie Mellon University
  *  Pittsburgh PA 15213-3890
+ *
  * any improvements or extensions that they make and grant Carnegie the
  * rights to redistribute these changes.
  */
 #include <sys/cdefs.h>
 /*__FBSDID("$FreeBSD: src/sys/ia64/ia64/machdep.c,v 1.203 2005/10/14 12:43:45 davidxu Exp $"); */
 #include "opt_modular.h"
 #include <sys/param.h>
 #include <sys/cpu.h>
 #include <sys/exec.h>
 #include <sys/ksyms.h>
 #include <sys/sa.h>
 #include <sys/savar.h>
 #include <sys/msgbuf.h>
 #include <sys/mutex.h>
 #include <sys/proc.h>
 #include <sys/reboot.h>
 #include <sys/systm.h>
 #include <sys/user.h>
 #include <machine/ia64_cpu.h>
 @@ -141,331 +141,323 @@ char	cpu_model[64];
 char	cpu_family[64];
 vaddr_t kernstart, kernend;
 /* XXX: Move this stuff to cpu_info */
 uint64_t processor_frequency;
 uint64_t bus_frequency;
 uint64_t itc_frequency;
 uint64_t ia64_pal_base;
 uint64_t ia64_port_base;
-extern u_int64_t ia64_gateway_page[];
+extern uint64_t ia64_gateway_page[];
-u_int64_t pa_bootinfo;
+uint64_t pa_bootinfo;
 struct bootinfo bootinfo;
 extern vaddr_t kernel_text, end;
 struct fpswa_iface *fpswa_iface;
 struct	user *proc0paddr; /* XXX: See: kern/kern_proc.c:proc0_init() */
 #define Mhz     1000000L
 #define Ghz     (1000L*Mhz)
 static void
 identifycpu(void)
+{
-        u_int64_t vendor[3];
+	uint64_t vendor[3];
-        const char *family_name, *model_name;
+	const char *family_name, *model_name;
-        u_int64_t features, tmp;
+	uint64_t features, tmp;
-        int number, revision, model, family, archrev;
+	int number, revision, model, family, archrev;
-        /*
+	/*
-         * Assumes little-endian.
+	 * Assumes little-endian.
-         */
+	 */
 	vendor[0] = ia64_get_cpuid(0);
 	vendor[1] = ia64_get_cpuid(1);
 	vendor[2] = '\0';
-        tmp = ia64_get_cpuid(3);
+	tmp = ia64_get_cpuid(3);
-        number = (tmp >> 0) & 0xff;
+	number = (tmp >> 0) & 0xff;
-        revision = (tmp >> 8) & 0xff;
+	revision = (tmp >> 8) & 0xff;
-        model = (tmp >> 16) & 0xff;
+	model = (tmp >> 16) & 0xff;
-        family = (tmp >> 24) & 0xff;
+	family = (tmp >> 24) & 0xff;
-        archrev = (tmp >> 32) & 0xff;
+	archrev = (tmp >> 32) & 0xff;
-        family_name = model_name = "unknown";
+	family_name = model_name = "unknown";
-        switch (family) {
+	switch (family) {
-        case 0x07:
+	case 0x07:
-                family_name = "Itanium";
+		family_name = "Itanium";
-                model_name = "Merced";
+		model_name = "Merced";
-                break;
+		break;
-        case 0x1f:
+	case 0x1f:
-                family_name = "Itanium 2";
+		family_name = "Itanium 2";
-                switch (model) {
+		switch (model) {
-                case 0x00:
+		case 0x00:
-                        model_name = "McKinley";
+			model_name = "McKinley";
-                        break;
+			break;
-                case 0x01:
+		case 0x01:
-                        /*
+			/*
-                         * Deerfield is a low-voltage variant based on the
+			 * Deerfield is a low-voltage variant based on the
-                         * Madison core. We need circumstantial evidence
+			 * Madison core. We need circumstantial evidence
-                         * (i.e. the clock frequency) to identify those.
+			 * (i.e. the clock frequency) to identify those.
-                         * Allow for roughly 1% error margin.
+			 * Allow for roughly 1% error margin.
-                         */
+			 */
-                        tmp = processor_frequency >> 7;
+			tmp = processor_frequency >> 7;
-                        if ((processor_frequency - tmp) < 1*Ghz &&
+			if ((processor_frequency - tmp) < 1*Ghz &&
-                            (processor_frequency + tmp) >= 1*Ghz)
+			    (processor_frequency + tmp) >= 1*Ghz)
-                                model_name = "Deerfield";
+				model_name = "Deerfield";
-                        else
+			else
-                                model_name = "Madison";
+				model_name = "Madison";
-                        break;
+			break;
-                case 0x02:
+		case 0x02:
-                        model_name = "Madison II";
+			model_name = "Madison II";
-                        break;
+			break;
+		}
-                break;
+		break;
+	}
-        snprintf(cpu_family, sizeof(cpu_family), "%s", family_name);
+	snprintf(cpu_family, sizeof(cpu_family), "%s", family_name);
-        snprintf(cpu_model, sizeof(cpu_model), "%s", model_name);
+	snprintf(cpu_model, sizeof(cpu_model), "%s", model_name);
-        features = ia64_get_cpuid(4);
+	features = ia64_get_cpuid(4);
-        printf("CPU: %s (", model_name);
+	printf("CPU: %s (", model_name);
-        if (processor_frequency) {
+	if (processor_frequency) {
-                printf("%ld.%02ld-Mhz ",
+		printf("%ld.%02ld-Mhz ", (processor_frequency + 4999) / Mhz,
-                    (processor_frequency + 4999) / Mhz,
+		    ((processor_frequency + 4999) / (Mhz/100)) % 100);
                     ((processor_frequency + 4999) / (Mhz/100)) % 100);
 	printf("%s)\n", family_name);
-        printf("%s)\n", family_name);
+	printf("  Origin = \"%s\"  Revision = %d\n", (char *) vendor, revision);
-        printf("  Origin = \"%s\"  Revision = %d\n", (char *) vendor, revision);
+	printf("  Features = 0x%x\n", (uint32_t) features);
         printf("  Features = 0x%x\n", (u_int32_t) features);
+}
 /*
  * Machine-dependent startup code
  */
 void
 cpu_startup(void)
+{
 	vaddr_t minaddr, maxaddr;
         char pbuf[9];
-        /*
+	/*
-         * Good {morning,afternoon,evening,night}.
+	 * Good {morning,afternoon,evening,night}.
-         */
+	 */
-        identifycpu();
+	identifycpu();
-        /* XXX: startrtclock(); */
+	/* XXX: startrtclock(); */
 #ifdef PERFMON
-        perfmon_init();
+	perfmon_init();
 #endif
-        printf("Detected memory  = %ld (%ld MB)\n", ia64_ptob(physmem),
+	printf("Detected memory  = %ld (%ld MB)\n", ia64_ptob(physmem),
-	       ptoa(physmem) / 1048576);
+	    ptoa(physmem) / 1048576);
 	/*
 	 * Display any holes after the first chunk of extended memory.
 	 */
 	if (bootverbose) {
 		int lcv, sizetmp;
-        /*
+		printf("Physical memory chunk(s):\n");
-         * Display any holes after the first chunk of extended memory.
+		for (lcv = 0;
-         */
+		    lcv < vm_nphysseg || vm_physmem[lcv].avail_end != 0;
-        if (bootverbose) {
+		    lcv++) {
-                int lcv, sizetmp;
+			sizetmp = vm_physmem[lcv].avail_end -
 			    vm_physmem[lcv].avail_start;
                 printf("Physical memory chunk(s):\n");
-                for (lcv = 0; lcv < vm_nphysseg || vm_physmem[lcv].avail_end != 0; lcv++) {
+			printf("0x%016lx - 0x%016lx, %ld bytes (%d pages)\n",
-                        sizetmp = vm_physmem[lcv].avail_end - vm_physmem[lcv].avail_start;
+			    ptoa(vm_physmem[lcv].avail_start),
 				ptoa(vm_physmem[lcv].avail_end) - 1,
-                        printf("0x%016lx - 0x%016lx, %ld bytes (%d pages)\n", ptoa(vm_physmem[lcv].avail_start),
+				    ptoa(sizetmp), sizetmp);
 			       ptoa(vm_physmem[lcv].avail_end) - 1, ptoa(sizetmp), sizetmp);
 		printf("Total number of segments: vm_nphysseg = %d \n",
-		printf("Total number of segments: vm_nphysseg = %d \n", vm_nphysseg);
+		    vm_nphysseg);
+	}
  	minaddr = 0;
 	/*
 	 * Allocate a submap for physio
 	 */
 	phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
 				   VM_PHYS_SIZE, 0, false, NULL);
 	/*
 	 * No need to allocate an mbuf cluster submap.  Mbuf clusters
 	 * are allocated via the pool allocator, and we use RR7 to
 	 * map those pages.
 	 */
-        format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
+	banner();
         printf("avail memory = %s\n", pbuf);
-        if (fpswa_iface == NULL)
+	if (fpswa_iface == NULL)
-                printf("Warning: no FPSWA package supplied\n");
+		printf("Warning: no FPSWA package supplied\n");
-        else
+	else
-                printf("FPSWA Revision = 0x%lx, Entry = %p\n",
+		printf("FPSWA Revision = 0x%lx, Entry = %p\n",
-                    (long)fpswa_iface->if_rev, (void *)fpswa_iface->if_fpswa);
+		    (long)fpswa_iface->if_rev, (void *)fpswa_iface->if_fpswa);
-        /* XXX: TODO this stuff when we start the platform port.
+	/*
-         * Traverse the MADT to discover IOSAPIC and Local SAPIC
+	 * Traverse the MADT to discover IOSAPIC and Local SAPIC
-         * information.
+	 * information.
-         */
+	 */
-        /*XXX: ia64_probe_sapics();*/
+	ia64_probe_sapics();
-        /*XXX: ia64_mca_init();*/
+	/*XXX: ia64_mca_init();*/
+}
 void
 cpu_reboot(int howto, char *bootstr)
+{
 	efi_reset_system();
 	panic("XXX: Reset didn't work ? \n");
 	/*NOTREACHED*/
+}
 lwp_t *
 cpu_switchto(lwp_t *cur, lwp_t *new, bool b)
 	return new;
 bool
 cpu_intr_p(void)
+{
 	return 0;
+}
 /*
  * This is called by main to set dumplo and dumpsize.
  * Dumps always skip the first PAGE_SIZE of disk space
  * in case there might be a disk label stored there.
  * If there is extra space, put dump at the end to
  * reduce the chance that swapping trashes it.
  */
 void
 cpu_dumpconf(void)
+{
 	return;
+}
 void
 consinit(void)
 	cninit();
 void
 map_pal_code(void)
+{
 	pt_entry_t pte;
-	u_int64_t psr;
+	uint64_t psr;
 	if (ia64_pal_base == 0)
 		return;
 	pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY |
 	    PTE_PL_KERN | PTE_AR_RWX;
 	pte |= ia64_pal_base & PTE_PPN_MASK;
 	__asm __volatile("ptr.d %0,%1; ptr.i %0,%1" ::
-			 "r"(IA64_PHYS_TO_RR7(ia64_pal_base)), "r"(IA64_ID_PAGE_SHIFT<<2));
+			 "r"(IA64_PHYS_TO_RR7(ia64_pal_base)),
 			 "r"(IA64_ID_PAGE_SHIFT<<2));
 	__asm __volatile("mov	%0=psr" : "=r"(psr));
 	__asm __volatile("rsm	psr.ic|psr.i");
-	__asm __volatile("srlz.i");
+	ia64_srlz_i();
-	__asm __volatile("mov	cr.ifa=%0" ::
+	ia64_set_ifa(IA64_PHYS_TO_RR7(ia64_pal_base));
-			 "r"(IA64_PHYS_TO_RR7(ia64_pal_base)));
+	ia64_set_itir(IA64_ID_PAGE_SHIFT << 2);
-	__asm __volatile("mov	cr.itir=%0" :: "r"(IA64_ID_PAGE_SHIFT << 2));
+	ia64_srlz_d();
- 	__asm __volatile("itr.d	dtr[%0]=%1" :: "r"(1), "r"(*(pt_entry_t *)&pte));
+ 	__asm __volatile("itr.d	dtr[%0]=%1" ::
-	__asm __volatile("srlz.d");
+			 "r"(1), "r"(*(pt_entry_t *)&pte));
- 	__asm __volatile("itr.i	itr[%0]=%1" :: "r"(1), "r"(*(pt_entry_t *)&pte));
+	ia64_srlz_d();
  	__asm __volatile("itr.i	itr[%0]=%1" ::
 			 "r"(1), "r"(*(pt_entry_t *)&pte));
 	__asm __volatile("mov	psr.l=%0" :: "r" (psr));
-	__asm __volatile("srlz.i");
+	ia64_srlz_i();
+}
 void
 map_gateway_page(void)
+{
 	pt_entry_t pte;
-	u_int64_t psr;
+	uint64_t psr;
 	pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY |
 	    PTE_PL_KERN | PTE_AR_X_RX;
 	pte |= (uint64_t)ia64_gateway_page & PTE_PPN_MASK;
 	__asm __volatile("ptr.d %0,%1; ptr.i %0,%1" ::
 	    "r"(VM_MAX_ADDRESS), "r"(PAGE_SHIFT << 2));
 	__asm __volatile("mov	%0=psr" : "=r"(psr));
 	__asm __volatile("rsm	psr.ic|psr.i");
-	__asm __volatile("srlz.i");
+	ia64_srlz_i();
-	__asm __volatile("mov	cr.ifa=%0" :: "r"(VM_MAX_ADDRESS));
+	ia64_set_ifa(VM_MAX_ADDRESS);
-	__asm __volatile("mov	cr.itir=%0" :: "r"(PAGE_SHIFT << 2));
+	ia64_set_itir(PAGE_SHIFT << 2);
 	ia64_srlz_d();
 	__asm __volatile("itr.d	dtr[%0]=%1" :: "r"(3), "r"(*(pt_entry_t*)&pte));
-	__asm __volatile("srlz.d");
+	ia64_srlz_d();
 	__asm __volatile("itr.i	itr[%0]=%1" :: "r"(3), "r"(*(pt_entry_t*)&pte));
 	__asm __volatile("mov	psr.l=%0" :: "r" (psr));
-	__asm __volatile("srlz.i");
+	ia64_srlz_i();
 	/* Expose the mapping to userland in ar.k5 */
 	ia64_set_k5(VM_MAX_ADDRESS);
+}
 static void
 calculate_frequencies(void)
+{
 	struct ia64_sal_result sal;
 	struct ia64_pal_result pal;
 	sal = ia64_sal_entry(SAL_FREQ_BASE, 0, 0, 0, 0, 0, 0, 0);
 	pal = ia64_call_pal_static(PAL_FREQ_RATIOS, 0, 0, 0);
 	if (sal.sal_status == 0 && pal.pal_status == 0) {
 		if (bootverbose) {
 			printf("Platform clock frequency %ld Hz\n",
-			       sal.sal_result[0]);
+			    sal.sal_result[0]);
 			printf("Processor ratio %ld/%ld, Bus ratio %ld/%ld, "
 			       "ITC ratio %ld/%ld\n",
-			       pal.pal_result[0] >> 32,
+			    pal.pal_result[0] >> 32,
-			       pal.pal_result[0] & ((1L << 32) - 1),
+			    pal.pal_result[0] & ((1L << 32) - 1),
-			       pal.pal_result[1] >> 32,
+			    pal.pal_result[1] >> 32,
-			       pal.pal_result[1] & ((1L << 32) - 1),
+			    pal.pal_result[1] & ((1L << 32) - 1),
-			       pal.pal_result[2] >> 32,
+			    pal.pal_result[2] >> 32,
-			       pal.pal_result[2] & ((1L << 32) - 1));
+			    pal.pal_result[2] & ((1L << 32) - 1));
+		}
 		processor_frequency =
 			sal.sal_result[0] * (pal.pal_result[0] >> 32)
 			/ (pal.pal_result[0] & ((1L << 32) - 1));
 		bus_frequency =
 			sal.sal_result[0] * (pal.pal_result[1] >> 32)
 			/ (pal.pal_result[1] & ((1L << 32) - 1));
 		itc_frequency =
 			sal.sal_result[0] * (pal.pal_result[2] >> 32)
 			/ (pal.pal_result[2] & ((1L << 32) - 1));
+	}
+}
 /* XXXX: Don't allocate 'ci' on stack. */
 register struct cpu_info *ci __asm__("r13");
 void
-ia64_init()
+ia64_init(void)
+{
 	paddr_t kernstartpfn, kernendpfn, pfn0, pfn1;
 	struct efi_md *md;
 	register struct cpu_info *ci __asm__("r13");
 	/* NO OUTPUT ALLOWED UNTIL FURTHER NOTICE */
 	/*
-         * TODO: Disable interrupts, floating point etc.
+	 * TODO: Disable interrupts, floating point etc.
-         * Maybe flush cache and tlb
+	 * Maybe flush cache and tlb
-         */
+	 */
 	ia64_set_fpsr(IA64_FPSR_DEFAULT);
 	/*
 	 * TODO: Get critical system information (if possible, from the
 	 * information provided by the boot program).
 	 */
 	/*
 	 * pa_bootinfo is the physical address of the bootinfo block as
 	 * passed to us by the loader and set in locore.s.
 	 */
 @@ -483,38 +475,38 @@ ia64_init()
 	 */
 	for (md = efi_md_first(); md != NULL; md = efi_md_next(md)) {
 		switch (md->md_type) {
 		case EFI_MD_TYPE_IOPORT:
 			ia64_port_base = IA64_PHYS_TO_RR6(md->md_phys);
 			break;
 		case EFI_MD_TYPE_PALCODE:
 			ia64_pal_base = md->md_phys;
 			break;
+		}
+	}
 	/* XXX: We need to figure out whether/how much of the FreeBSD
 	 *      getenv/setenv stuff we need. The info we get from ski
 	 *      is too trivial to go to the hassle of importing the
 	 *	FreeBSD environment stuff.
 	 */
 	/*
 	 * Look at arguments passed to us and compute boothowto.
 	 */
 	boothowto = bootinfo.bi_boothowto;
-        /* XXX: Debug: Override to verbose */
+	/* XXX: Debug: Override to verbose */
 	boothowto |= AB_VERBOSE;
 	/*
 	 * Initialize the console before we print anything out.
 	 */
 	cninit();
 	/* OUTPUT NOW ALLOWED */
 	if (ia64_pal_base != 0) {
 		ia64_pal_base &= ~IA64_ID_PAGE_MASK;
 		/*
 @@ -585,27 +577,27 @@ ia64_init()
 		/*
 		 * Wimp out for now since we do not DTRT here with
 		 * pci bus mastering (no bounce buffering, for example).
 		 */
 		if (pfn0 >= ia64_btop(0x100000000UL)) {
 			printf("Skipping memory chunk start 0x%lx\n",
 			    md->md_phys);
 			continue;
+		}
 		if (pfn1 >= ia64_btop(0x100000000UL)) {
 			printf("Skipping memory chunk end 0x%lx\n",
 			    md->md_phys + md->md_pages * 4096);
 			continue;
+		}
 		/*
 		 * We have a memory descriptor that describes conventional
 		 * memory that is for general use. We must determine if the
 		 * loader has put the kernel in this region.
 		 */
 		physmem += (pfn1 - pfn0);
 		if (pfn0 <= kernendpfn && kernstartpfn <= pfn1) {
 			/*
 			 * Must compute the location of the kernel
 			 * within the segment.
 			 */
 #ifdef DEBUG
 @@ -624,35 +616,35 @@ ia64_init()
+			}
 			if (kernendpfn < pfn1) {
 				/*
 				 * There is a chunk after the kernel.
 				 */
 #ifdef DEBUG
 				printf("Loading chunk after kernel: "
 				       "0x%lx / 0x%lx\n", kernendpfn, pfn1);
 #endif
 				uvm_page_physload(kernendpfn, pfn1,
 				    kernendpfn, pfn1, VM_FREELIST_DEFAULT);
+			}
 		} else {
 			/*
 			 * Just load this cluster as one chunk.
 			 */
 #ifdef DEBUG
-			printf("Loading descriptor %p: 0x%lx / 0x%lx\n", md,
+			printf("Loading descriptor %p: 0x%lx / 0x%lx\n",
-			       pfn0, pfn1);
+			    md, pfn0, pfn1);
 #endif
 			uvm_page_physload(pfn0, pfn1, pfn0, pfn1,
 			    VM_FREELIST_DEFAULT);
+		}
+	}
 	if (physmem == 0)
 		panic("can't happen: system seems to have no memory!");
 	/*
 	 * Initialize the virtual memory system.
 @@ -670,126 +662,138 @@ ia64_init()
 	 * Init mapping for u page(s) for proc 0
 	 */
 	lwp0.l_addr = proc0paddr =
 	    (struct user *)uvm_pageboot_alloc(UPAGES * PAGE_SIZE);
 	/*
 	 * Set the kernel sp, reserving space for an (empty) trapframe,
 	 * and make proc0's trapframe pointer point to it for sanity.
 	 */
 	/*
 	 * Process u-area is organised as follows:
+	 *
 	 *  -----------------------------------------------------------
 	 * |  P  |                  |                    | 16Bytes | T |
 	 * |  C  | Register Stack   |      Memory Stack  | <-----> | F |
 	 * |  B  | ------------->   |       <----------  |         |   |
 	 *  -----------------------------------------------------------
 	 *        ^                                      ^
 	 *        |___ bspstore                          |___ sp
+	 *
 	 *                 --------------------------->
          *                       Higher Addresses
+	 *
 	 *	PCB: struct user;    TF: struct trapframe;
 	 */
-	lwp0.l_md.md_tf = (struct trapframe *)
+	lwp0.l_md.md_tf = (struct trapframe *)((uint64_t)proc0paddr +
-		((u_int64_t)proc0paddr + USPACE - sizeof(struct trapframe));
+					USPACE - sizeof(struct trapframe));
 	proc0paddr->u_pcb.pcb_special.sp =
-		(u_int64_t)lwp0.l_md.md_tf - 16; /* 16 bytes is the
+	    (uint64_t)lwp0.l_md.md_tf - 16;	/* 16 bytes is the
-						  * scratch area defined
+						 * scratch area defined
-						  * by the ia64 ABI
+						 * by the ia64 ABI
-						  */
+						 */
 	proc0paddr->u_pcb.pcb_special.bspstore =
-		(u_int64_t) proc0paddr + sizeof(struct user);
+	    (uint64_t) proc0paddr + sizeof(struct user);
-	mutex_init(&proc0paddr->u_pcb.pcb_fpcpu_slock, MUTEX_SPIN, 0);
+	mutex_init(&proc0paddr->u_pcb.pcb_fpcpu_slock, MUTEX_DEFAULT, 0);
 	/*
 	 * Setup global data for the bootstrap cpu.
 	 */
 	ci = curcpu();
 	/* ar.k4 contains the cpu_info pointer to the
 	 * current cpu.
 	 */
-	ia64_set_k4((u_int64_t) ci);
+	ia64_set_k4((uint64_t) ci);
 	ci->ci_cpuid = cpu_number();
-	/* Initialise process context. XXX: This should really be in cpu_switch*/
+	/*
 	 * Initialise process context. XXX: This should really be in cpu_switch
 	 */
 	ci->ci_curlwp = &lwp0;
 	/*
 	 * Initialize the primary CPU's idle PCB to proc0's.  In a
 	 * MULTIPROCESSOR configuration, each CPU will later get
 	 * its own idle PCB when autoconfiguration runs.
 	 */
 	ci->ci_idle_pcb = &proc0paddr->u_pcb;
 	/* Indicate that proc0 has a CPU. */
 	lwp0.l_cpu = ci;
 	ia64_set_tpr(0);
 	ia64_srlz_d();
 	/*
 	 * Save our current context so that we have a known (maybe even
 	 * sane) context as the initial context for new threads that are
 	 * forked from us.
 	 */
 	if (savectx(&lwp0.l_addr->u_pcb)) panic("savectx failed");
 	/*
 	 * Initialize debuggers, and break into them if appropriate.
 	 */
 #if NKSYMS || defined(DDB) || defined(MODULAR)
-	ksyms_addsyms_elf((int)((u_int64_t)ksym_end - (u_int64_t)ksym_start),
+	ksyms_addsyms_elf((int)((uint64_t)ksym_end - (uint64_t)ksym_start),
 	    ksym_start, ksym_end);
 #endif
-#if defined(DDB)
+#ifdef DDB
-	Debugger();
+	if (boothowto & RB_KDB)
-#endif
+		Debugger();
 #endif
 	extern void main(void);
 	main();
 	panic("Wheeee!!! main() returned!!! \n");
+}
 uint64_t
 ia64_get_hcdp(void)
+{
 	return bootinfo.bi_hcdp;
+}
 /*
  * Set registers on exec.
  */
 void
 setregs(register struct lwp *l, struct exec_package *pack, u_long stack)
+{
 	struct trapframe *tf;
 	uint64_t *ksttop, *kst, regstkp;
 	tf = l->l_md.md_tf;
 	regstkp = (uint64_t) (l->l_addr) + sizeof(struct user);
-	ksttop = (uint64_t*) (regstkp + tf->tf_special.ndirty +
+	ksttop =
-			      (tf->tf_special.bspstore & 0x1ffUL));
+	    (uint64_t*)(regstkp + tf->tf_special.ndirty +
 					(tf->tf_special.bspstore & 0x1ffUL));
 	/* XXX: tf_special.ndirty on a new stack frame ??? */
 	/*
 	 * We can ignore up to 8KB of dirty registers by masking off the
 	 * lower 13 bits in exception_restore() or epc_syscall(). This
 	 * should be enough for a couple of years, but if there are more
 	 * than 8KB of dirty registers, we lose track of the bottom of
 	 * the kernel stack. The solution is to copy the active part of
 	 * the kernel stack down 1 page (or 2, but not more than that)
 	 * so that we always have less than 8KB of dirty registers.
 	 */
 	KASSERT((tf->tf_special.ndirty & ~PAGE_MASK) == 0);
 @@ -798,79 +802,79 @@ setregs(register struct lwp *l, struct e
 	if ((tf->tf_flags & FRAME_SYSCALL) == 0) {	/* break syscalls. */
 		memset(&tf->tf_scratch, 0, sizeof(tf->tf_scratch));
 		memset(&tf->tf_scratch_fp, 0, sizeof(tf->tf_scratch_fp));
 		tf->tf_special.cfm = (1UL<<63) | (3UL<<7) | 3UL;
 		tf->tf_special.bspstore = IA64_BACKINGSTORE;
 		/*
 		 * Copy the arguments onto the kernel register stack so that
 		 * they get loaded by the loadrs instruction. Skip over the
 		 * NaT collection points.
 		 */
 		kst = ksttop - 1;
 		if (((uintptr_t)kst & 0x1ff) == 0x1f8)
 			*kst-- = 0;
-		*kst-- = (u_int64_t)l->l_proc->p_psstr;	/* in3 = ps_strings */
+		*kst-- = (uint64_t)l->l_proc->p_psstr;	/* in3 = ps_strings */
 		if (((uintptr_t)kst & 0x1ff) == 0x1f8)
 			*kst-- = 0;
 		*kst-- = 0;				/* in2 = *obj */
 		if (((uintptr_t)kst & 0x1ff) == 0x1f8)
 			*kst-- = 0;
 		*kst-- = 0;				/* in1 = *cleanup */
 		if (((uintptr_t)kst & 0x1ff) == 0x1f8)
 			*kst-- = 0;
 		*kst = stack; /* in0 = sp */
 		tf->tf_special.ndirty = (ksttop - kst) << 3;
 	} else {				/* epc syscalls (default). */
 		tf->tf_special.cfm = (3UL<<62) | (3UL<<7) | 3UL;
 		tf->tf_special.bspstore = IA64_BACKINGSTORE + 24;
 		/*
-		 * Write values for out0, out1, out2 and out3 to the user's backing
+		 * Write values for out0, out1, out2 and out3 to the user's
-		 * store and arrange for them to be restored into the user's
+		 * backing store and arrange for them to be restored into
-		 * initial register frame.
+		 * the user's initial register frame.
 		 * Assumes that (bspstore & 0x1f8) < 0x1e0.
 		 */
 		/* in0 = sp */
 		suword((char *)tf->tf_special.bspstore - 32, stack);
 		/* in1 == *cleanup */
 		suword((char *)tf->tf_special.bspstore -  24, 0);
 		/* in2 == *obj */
 		suword((char *)tf->tf_special.bspstore -  16, 0);
 		/* in3 = ps_strings */
 		suword((char *)tf->tf_special.bspstore - 8,
-		       (u_int64_t)l->l_proc->p_psstr);
+		    (uint64_t)l->l_proc->p_psstr);
+	}
 	tf->tf_special.iip = pack->ep_entry;
 	tf->tf_special.sp = (stack & ~15) - 16;
 	tf->tf_special.rsc = 0xf;
 	tf->tf_special.fpsr = IA64_FPSR_DEFAULT;
 	tf->tf_special.psr = IA64_PSR_IC | IA64_PSR_I | IA64_PSR_IT |
 	    IA64_PSR_DT | IA64_PSR_RT | IA64_PSR_DFH | IA64_PSR_BN |
 	    IA64_PSR_CPL_USER;
 	return;
+}
 void
-sendsig(const ksiginfo_t *ksi, const sigset_t *mask)
+sendsig_siginfo(const ksiginfo_t *ksi, const sigset_t *mask)
+{
 	return;
+}
 void
 cpu_upcall(struct lwp *l, int type, int nevents, int ninterrupted, void *sas, void *ap, void *sp, sa_upcall_t upcall)
+{
 	return;
+}
 void
 cpu_getmcontext(struct lwp *l, mcontext_t *mcp, unsigned int *flags)
+{
 	return;
+}
 int
 cpu_setmcontext(struct lwp *l, const mcontext_t *mcp, unsigned int flags)

 @@ -1,63 +1,90 @@
-/*	$NetBSD: mainbus.c,v 1.4 2009/03/14 21:04:10 dsl Exp $	*/
+/*	$NetBSD: mainbus.c,v 1.5 2009/07/20 05:10:49 kiyohara Exp $	*/
 /*-
  * Copyright (c) 2006 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * Author:
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.4 2009/03/14 21:04:10 dsl Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.5 2009/07/20 05:10:49 kiyohara Exp $");
 #include "acpi.h"
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/device.h>
 #include <sys/errno.h>
-int	mainbus_match(struct device *, struct cfdata *, void *);
+#include <machine/bus.h>
 void	mainbus_attach(struct device *, struct device *, void *);
-CFATTACH_DECL(mainbus, sizeof(struct device),
+#include <dev/acpi/acpivar.h>
 static int mainbus_match(struct device *, struct cfdata *, void *);
 static void mainbus_attach(struct device *, struct device *, void *);
 CFATTACH_DECL_NEW(mainbus, sizeof(struct device),
     mainbus_match, mainbus_attach, NULL, NULL);
 /*
  * Probe for the mainbus; always succeeds.
  */
-int
+static int
-mainbus_match(struct device *parent, struct cfdata *match, void *aux)
+mainbus_match(device_t parent, struct cfdata *match, void *aux)
+{
 	return 1;
+}
 /*
  * Attach the mainbus.
  */
-void
+static void
-mainbus_attach(struct device *parent, struct device *self, void *aux)
+mainbus_attach(device_t parent, device_t self, void *aux)
+{
 #if NACPI > 0
 	struct acpibus_attach_args aaa;
 #endif
 	aprint_naive("\n");
 	aprint_normal("\n");
 #if NACPI > 0
 	acpi_probe();
 	aaa.aa_iot = IA64_BUS_SPACE_IO;
 	aaa.aa_memt = IA64_BUS_SPACE_MEM;
 	aaa.aa_pc = 0;
 	aaa.aa_pciflags =
 	    PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
 	    PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY |
 	    PCI_FLAGS_MWI_OKAY;
 	aaa.aa_ic = 0;
 	config_found_ia(self, "acpibus", &aaa, 0);
 #endif
 	return;
+}