@@ -1,4 +1,4 @@
-/* $NetBSD: machdep.c,v 1.15 2009/03/18 16:00:12 cegger Exp $ */
+/* $NetBSD: machdep.c,v 1.16 2009/07/20 05:10:49 kiyohara Exp $ */
/*-
* Copyright (c) 2003,2004 Marcel Moolenaar
@@ -62,17 +62,17 @@
* All rights reserved.
*
* Author: Chris G. Demetriou
- *
+ *
* Permission to use, copy, modify and distribute this software and
* its documentation is hereby granted, provided that both the copyright
* notice and this permission notice appear in all copies of the
* software, derivative works or modified versions, and any portions
* thereof, and that both notices appear in supporting documentation.
- *
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
- * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- *
+ *
* Carnegie Mellon requests users of this software to return to
*
* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
@@ -89,7 +89,7 @@
#include "opt_modular.h"
-#include <sys/param.h>
+#include <sys/param.h>
#include <sys/cpu.h>
#include <sys/exec.h>
#include <sys/ksyms.h>
@@ -151,9 +151,9 @@
uint64_t ia64_port_base;
-extern u_int64_t ia64_gateway_page[];
+extern uint64_t ia64_gateway_page[];
-u_int64_t pa_bootinfo;
+uint64_t pa_bootinfo;
struct bootinfo bootinfo;
@@ -168,73 +168,72 @@
static void
identifycpu(void)
-{
- u_int64_t vendor[3];
- const char *family_name, *model_name;
- u_int64_t features, tmp;
- int number, revision, model, family, archrev;
-
- /*
- * Assumes little-endian.
- */
+{
+ uint64_t vendor[3];
+ const char *family_name, *model_name;
+ uint64_t features, tmp;
+ int number, revision, model, family, archrev;
+
+ /*
+ * Assumes little-endian.
+ */
vendor[0] = ia64_get_cpuid(0);
- vendor[1] = ia64_get_cpuid(1);
- vendor[2] = '\0';
-
- tmp = ia64_get_cpuid(3);
- number = (tmp >> 0) & 0xff;
- revision = (tmp >> 8) & 0xff;
- model = (tmp >> 16) & 0xff;
- family = (tmp >> 24) & 0xff;
- archrev = (tmp >> 32) & 0xff;
-
- family_name = model_name = "unknown";
- switch (family) {
- case 0x07:
- family_name = "Itanium";
- model_name = "Merced";
- break;
- case 0x1f:
- family_name = "Itanium 2";
- switch (model) {
- case 0x00:
- model_name = "McKinley";
- break;
- case 0x01:
- /*
- * Deerfield is a low-voltage variant based on the
- * Madison core. We need circumstantial evidence
- * (i.e. the clock frequency) to identify those.
- * Allow for roughly 1% error margin.
- */
- tmp = processor_frequency >> 7;
- if ((processor_frequency - tmp) < 1*Ghz &&
- (processor_frequency + tmp) >= 1*Ghz)
- model_name = "Deerfield";
- else
- model_name = "Madison";
- break;
- case 0x02:
- model_name = "Madison II";
- break;
- }
- break;
- }
- snprintf(cpu_family, sizeof(cpu_family), "%s", family_name);
- snprintf(cpu_model, sizeof(cpu_model), "%s", model_name);
-
- features = ia64_get_cpuid(4);
-
- printf("CPU: %s (", model_name);
- if (processor_frequency) {
- printf("%ld.%02ld-Mhz ",
- (processor_frequency + 4999) / Mhz,
- ((processor_frequency + 4999) / (Mhz/100)) % 100);
- }
- printf("%s)\n", family_name);
- printf(" Origin = \"%s\" Revision = %d\n", (char *) vendor, revision);
- printf(" Features = 0x%x\n", (u_int32_t) features);
+ vendor[1] = ia64_get_cpuid(1);
+ vendor[2] = '\0';
+ tmp = ia64_get_cpuid(3);
+ number = (tmp >> 0) & 0xff;
+ revision = (tmp >> 8) & 0xff;
+ model = (tmp >> 16) & 0xff;
+ family = (tmp >> 24) & 0xff;
+ archrev = (tmp >> 32) & 0xff;
+
+ family_name = model_name = "unknown";
+ switch (family) {
+ case 0x07:
+ family_name = "Itanium";
+ model_name = "Merced";
+ break;
+ case 0x1f:
+ family_name = "Itanium 2";
+ switch (model) {
+ case 0x00:
+ model_name = "McKinley";
+ break;
+ case 0x01:
+ /*
+ * Deerfield is a low-voltage variant based on the
+ * Madison core. We need circumstantial evidence
+ * (i.e. the clock frequency) to identify those.
+ * Allow for roughly 1% error margin.
+ */
+ tmp = processor_frequency >> 7;
+ if ((processor_frequency - tmp) < 1*Ghz &&
+ (processor_frequency + tmp) >= 1*Ghz)
+ model_name = "Deerfield";
+ else
+ model_name = "Madison";
+ break;
+ case 0x02:
+ model_name = "Madison II";
+ break;
+ }
+ break;
+ }
+ snprintf(cpu_family, sizeof(cpu_family), "%s", family_name);
+ snprintf(cpu_model, sizeof(cpu_model), "%s", model_name);
+
+ features = ia64_get_cpuid(4);
+
+ printf("CPU: %s (", model_name);
+ if (processor_frequency) {
+ printf("%ld.%02ld-Mhz ", (processor_frequency + 4999) / Mhz,
+ ((processor_frequency + 4999) / (Mhz/100)) % 100);
+ }
+ printf("%s)\n", family_name);
+ printf(" Origin = \"%s\" Revision = %d\n", (char *) vendor, revision);
+ printf(" Features = 0x%x\n", (uint32_t) features);
+
}
/*
@@ -244,36 +243,40 @@
cpu_startup(void)
{
vaddr_t minaddr, maxaddr;
-
- char pbuf[9];
- /*
- * Good {morning,afternoon,evening,night}.
- */
- identifycpu();
+ /*
+ * Good {morning,afternoon,evening,night}.
+ */
+ identifycpu();
- /* XXX: startrtclock(); */
+ /* XXX: startrtclock(); */
#ifdef PERFMON
- perfmon_init();
+ perfmon_init();
#endif
- printf("Detected memory = %ld (%ld MB)\n", ia64_ptob(physmem),
- ptoa(physmem) / 1048576);
+ printf("Detected memory = %ld (%ld MB)\n", ia64_ptob(physmem),
+ ptoa(physmem) / 1048576);
- /*
- * Display any holes after the first chunk of extended memory.
- */
- if (bootverbose) {
- int lcv, sizetmp;
+ /*
+ * Display any holes after the first chunk of extended memory.
+ */
+ if (bootverbose) {
+ int lcv, sizetmp;
- printf("Physical memory chunk(s):\n");
- for (lcv = 0; lcv < vm_nphysseg || vm_physmem[lcv].avail_end != 0; lcv++) {
- sizetmp = vm_physmem[lcv].avail_end - vm_physmem[lcv].avail_start;
+ printf("Physical memory chunk(s):\n");
+ for (lcv = 0;
+ lcv < vm_nphysseg || vm_physmem[lcv].avail_end != 0;
+ lcv++) {
+ sizetmp = vm_physmem[lcv].avail_end -
+ vm_physmem[lcv].avail_start;
- printf("0x%016lx - 0x%016lx, %ld bytes (%d pages)\n", ptoa(vm_physmem[lcv].avail_start),
- ptoa(vm_physmem[lcv].avail_end) - 1, ptoa(sizetmp), sizetmp);
- }
- printf("Total number of segments: vm_nphysseg = %d \n", vm_nphysseg);
- }
+ printf("0x%016lx - 0x%016lx, %ld bytes (%d pages)\n",
+ ptoa(vm_physmem[lcv].avail_start),
+ ptoa(vm_physmem[lcv].avail_end) - 1,
+ ptoa(sizetmp), sizetmp);
+ }
+ printf("Total number of segments: vm_nphysseg = %d \n",
+ vm_nphysseg);
+ }
minaddr = 0;
@@ -289,22 +292,21 @@
* map those pages.
*/
- format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
- printf("avail memory = %s\n", pbuf);
+ banner();
- if (fpswa_iface == NULL)
- printf("Warning: no FPSWA package supplied\n");
- else
- printf("FPSWA Revision = 0x%lx, Entry = %p\n",
- (long)fpswa_iface->if_rev, (void *)fpswa_iface->if_fpswa);
+ if (fpswa_iface == NULL)
+ printf("Warning: no FPSWA package supplied\n");
+ else
+ printf("FPSWA Revision = 0x%lx, Entry = %p\n",
+ (long)fpswa_iface->if_rev, (void *)fpswa_iface->if_fpswa);
- /* XXX: TODO this stuff when we start the platform port.
- * Traverse the MADT to discover IOSAPIC and Local SAPIC
- * information.
- */
- /*XXX: ia64_probe_sapics();*/
- /*XXX: ia64_mca_init();*/
+ /*
+ * Traverse the MADT to discover IOSAPIC and Local SAPIC
+ * information.
+ */
+ ia64_probe_sapics();
+ /*XXX: ia64_mca_init();*/
}
void
@@ -317,12 +319,6 @@
/*NOTREACHED*/
}
-lwp_t *
-cpu_switchto(lwp_t *cur, lwp_t *new, bool b)
-{
- return new;
-}
-
bool
cpu_intr_p(void)
{
@@ -343,45 +339,42 @@
}
void
-consinit(void)
-{
- cninit();
-}
-
-void
map_pal_code(void)
{
pt_entry_t pte;
- u_int64_t psr;
+ uint64_t psr;
if (ia64_pal_base == 0)
return;
-
+
pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY |
PTE_PL_KERN | PTE_AR_RWX;
pte |= ia64_pal_base & PTE_PPN_MASK;
__asm __volatile("ptr.d %0,%1; ptr.i %0,%1" ::
- "r"(IA64_PHYS_TO_RR7(ia64_pal_base)), "r"(IA64_ID_PAGE_SHIFT<<2));
+ "r"(IA64_PHYS_TO_RR7(ia64_pal_base)),
+ "r"(IA64_ID_PAGE_SHIFT<<2));
__asm __volatile("mov %0=psr" : "=r"(psr));
__asm __volatile("rsm psr.ic|psr.i");
- __asm __volatile("srlz.i");
- __asm __volatile("mov cr.ifa=%0" ::
- "r"(IA64_PHYS_TO_RR7(ia64_pal_base)));
- __asm __volatile("mov cr.itir=%0" :: "r"(IA64_ID_PAGE_SHIFT << 2));
- __asm __volatile("itr.d dtr[%0]=%1" :: "r"(1), "r"(*(pt_entry_t *)&pte));
- __asm __volatile("srlz.d");
- __asm __volatile("itr.i itr[%0]=%1" :: "r"(1), "r"(*(pt_entry_t *)&pte));
+ ia64_srlz_i();
+ ia64_set_ifa(IA64_PHYS_TO_RR7(ia64_pal_base));
+ ia64_set_itir(IA64_ID_PAGE_SHIFT << 2);
+ ia64_srlz_d();
+ __asm __volatile("itr.d dtr[%0]=%1" ::
+ "r"(1), "r"(*(pt_entry_t *)&pte));
+ ia64_srlz_d();
+ __asm __volatile("itr.i itr[%0]=%1" ::
+ "r"(1), "r"(*(pt_entry_t *)&pte));
__asm __volatile("mov psr.l=%0" :: "r" (psr));
- __asm __volatile("srlz.i");
+ ia64_srlz_i();
}
void
map_gateway_page(void)
{
pt_entry_t pte;
- u_int64_t psr;
+ uint64_t psr;
pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY |
PTE_PL_KERN | PTE_AR_X_RX;
@@ -392,14 +385,15 @@
__asm __volatile("mov %0=psr" : "=r"(psr));
__asm __volatile("rsm psr.ic|psr.i");
- __asm __volatile("srlz.i");
- __asm __volatile("mov cr.ifa=%0" :: "r"(VM_MAX_ADDRESS));
- __asm __volatile("mov cr.itir=%0" :: "r"(PAGE_SHIFT << 2));
+ ia64_srlz_i();
+ ia64_set_ifa(VM_MAX_ADDRESS);
+ ia64_set_itir(PAGE_SHIFT << 2);
+ ia64_srlz_d();
__asm __volatile("itr.d dtr[%0]=%1" :: "r"(3), "r"(*(pt_entry_t*)&pte));
- __asm __volatile("srlz.d");
+ ia64_srlz_d();
__asm __volatile("itr.i itr[%0]=%1" :: "r"(3), "r"(*(pt_entry_t*)&pte));
__asm __volatile("mov psr.l=%0" :: "r" (psr));
- __asm __volatile("srlz.i");
+ ia64_srlz_i();
/* Expose the mapping to userland in ar.k5 */
ia64_set_k5(VM_MAX_ADDRESS);
@@ -416,15 +410,15 @@
if (sal.sal_status == 0 && pal.pal_status == 0) {
if (bootverbose) {
printf("Platform clock frequency %ld Hz\n",
- sal.sal_result[0]);
+ sal.sal_result[0]);
printf("Processor ratio %ld/%ld, Bus ratio %ld/%ld, "
"ITC ratio %ld/%ld\n",
- pal.pal_result[0] >> 32,
- pal.pal_result[0] & ((1L << 32) - 1),
- pal.pal_result[1] >> 32,
- pal.pal_result[1] & ((1L << 32) - 1),
- pal.pal_result[2] >> 32,
- pal.pal_result[2] & ((1L << 32) - 1));
+ pal.pal_result[0] >> 32,
+ pal.pal_result[0] & ((1L << 32) - 1),
+ pal.pal_result[1] >> 32,
+ pal.pal_result[1] & ((1L << 32) - 1),
+ pal.pal_result[2] >> 32,
+ pal.pal_result[2] & ((1L << 32) - 1));
}
processor_frequency =
sal.sal_result[0] * (pal.pal_result[0] >> 32)
@@ -440,22 +434,20 @@
}
+/* XXXX: Don't allocate 'ci' on stack. */
+register struct cpu_info *ci __asm__("r13");
void
-ia64_init()
+ia64_init(void)
{
-
paddr_t kernstartpfn, kernendpfn, pfn0, pfn1;
-
struct efi_md *md;
- register struct cpu_info *ci __asm__("r13");
-
/* NO OUTPUT ALLOWED UNTIL FURTHER NOTICE */
/*
- * TODO: Disable interrupts, floating point etc.
- * Maybe flush cache and tlb
- */
+ * TODO: Disable interrupts, floating point etc.
+ * Maybe flush cache and tlb
+ */
ia64_set_fpsr(IA64_FPSR_DEFAULT);
@@ -493,9 +485,9 @@
}
- /* XXX: We need to figure out whether/how much of the FreeBSD
+ /* XXX: We need to figure out whether/how much of the FreeBSD
* getenv/setenv stuff we need. The info we get from ski
- * is too trivial to go to the hassle of importing the
+ * is too trivial to go to the hassle of importing the
* FreeBSD environment stuff.
*/
@@ -504,7 +496,7 @@
*/
boothowto = bootinfo.bi_boothowto;
- /* XXX: Debug: Override to verbose */
+ /* XXX: Debug: Override to verbose */
boothowto |= AB_VERBOSE;
@@ -595,7 +587,7 @@
printf("Skipping memory chunk end 0x%lx\n",
md->md_phys + md->md_pages * 4096);
continue;
- }
+ }
/*
* We have a memory descriptor that describes conventional
@@ -634,15 +626,15 @@
uvm_page_physload(kernendpfn, pfn1,
kernendpfn, pfn1, VM_FREELIST_DEFAULT);
-
+
}
} else {
/*
* Just load this cluster as one chunk.
*/
#ifdef DEBUG
- printf("Loading descriptor %p: 0x%lx / 0x%lx\n", md,
- pfn0, pfn1);
+ printf("Loading descriptor %p: 0x%lx / 0x%lx\n",
+ md, pfn0, pfn1);
#endif
uvm_page_physload(pfn0, pfn1, pfn0, pfn1,
@@ -680,7 +672,7 @@
/*
* Process u-area is organised as follows:
- *
+ *
* -----------------------------------------------------------
* | P | | | 16Bytes | T |
* | C | Register Stack | Memory Stack | <-----> | F |
@@ -692,23 +684,23 @@
* --------------------------->
* Higher Addresses
*
- * PCB: struct user; TF: struct trapframe;
+ * PCB: struct user; TF: struct trapframe;
*/
- lwp0.l_md.md_tf = (struct trapframe *)
- ((u_int64_t)proc0paddr + USPACE - sizeof(struct trapframe));
+ lwp0.l_md.md_tf = (struct trapframe *)((uint64_t)proc0paddr +
+ USPACE - sizeof(struct trapframe));
- proc0paddr->u_pcb.pcb_special.sp =
- (u_int64_t)lwp0.l_md.md_tf - 16; /* 16 bytes is the
- * scratch area defined
- * by the ia64 ABI
- */
+ proc0paddr->u_pcb.pcb_special.sp =
+ (uint64_t)lwp0.l_md.md_tf - 16; /* 16 bytes is the
+ * scratch area defined
+ * by the ia64 ABI
+ */
- proc0paddr->u_pcb.pcb_special.bspstore =
- (u_int64_t) proc0paddr + sizeof(struct user);
+ proc0paddr->u_pcb.pcb_special.bspstore =
+ (uint64_t) proc0paddr + sizeof(struct user);
- mutex_init(&proc0paddr->u_pcb.pcb_fpcpu_slock, MUTEX_SPIN, 0);
+ mutex_init(&proc0paddr->u_pcb.pcb_fpcpu_slock, MUTEX_DEFAULT, 0);
/*
@@ -718,14 +710,16 @@
ci = curcpu();
- /* ar.k4 contains the cpu_info pointer to the
+ /* ar.k4 contains the cpu_info pointer to the
* current cpu.
*/
- ia64_set_k4((u_int64_t) ci);
+ ia64_set_k4((uint64_t) ci);
ci->ci_cpuid = cpu_number();
- /* Initialise process context. XXX: This should really be in cpu_switch*/
+ /*
+ * Initialise process context. XXX: This should really be in cpu_switch
+ */
ci->ci_curlwp = &lwp0;
/*
@@ -740,11 +734,12 @@
ia64_set_tpr(0);
+ ia64_srlz_d();
/*
* Save our current context so that we have a known (maybe even
* sane) context as the initial context for new threads that are
- * forked from us.
+ * forked from us.
*/
if (savectx(&lwp0.l_addr->u_pcb)) panic("savectx failed");
@@ -752,13 +747,14 @@
* Initialize debuggers, and break into them if appropriate.
*/
#if NKSYMS || defined(DDB) || defined(MODULAR)
- ksyms_addsyms_elf((int)((u_int64_t)ksym_end - (u_int64_t)ksym_start),
+ ksyms_addsyms_elf((int)((uint64_t)ksym_end - (uint64_t)ksym_start),
ksym_start, ksym_end);
#endif
-#if defined(DDB)
- Debugger();
-#endif
+#ifdef DDB
+ if (boothowto & RB_KDB)
+ Debugger();
+#endif
extern void main(void);
main();
@@ -766,6 +762,13 @@
panic("Wheeee!!! main() returned!!! \n");
}
+uint64_t
+ia64_get_hcdp(void)
+{
+
+ return bootinfo.bi_hcdp;
+}
+
/*
* Set registers on exec.
*/
@@ -778,8 +781,9 @@
tf = l->l_md.md_tf;
regstkp = (uint64_t) (l->l_addr) + sizeof(struct user);
- ksttop = (uint64_t*) (regstkp + tf->tf_special.ndirty +
- (tf->tf_special.bspstore & 0x1ffUL));
+ ksttop =
+ (uint64_t*)(regstkp + tf->tf_special.ndirty +
+ (tf->tf_special.bspstore & 0x1ffUL));
/* XXX: tf_special.ndirty on a new stack frame ??? */
@@ -808,7 +812,7 @@
kst = ksttop - 1;
if (((uintptr_t)kst & 0x1ff) == 0x1f8)
*kst-- = 0;
- *kst-- = (u_int64_t)l->l_proc->p_psstr; /* in3 = ps_strings */
+ *kst-- = (uint64_t)l->l_proc->p_psstr; /* in3 = ps_strings */
if (((uintptr_t)kst & 0x1ff) == 0x1f8)
*kst-- = 0;
*kst-- = 0; /* in2 = *obj */
@@ -823,9 +827,9 @@
tf->tf_special.cfm = (3UL<<62) | (3UL<<7) | 3UL;
tf->tf_special.bspstore = IA64_BACKINGSTORE + 24;
/*
- * Write values for out0, out1, out2 and out3 to the user's backing
- * store and arrange for them to be restored into the user's
- * initial register frame.
+ * Write values for out0, out1, out2 and out3 to the user's
+ * backing store and arrange for them to be restored into
+ * the user's initial register frame.
* Assumes that (bspstore & 0x1f8) < 0x1e0.
*/
@@ -838,9 +842,9 @@
/* in2 == *obj */
suword((char *)tf->tf_special.bspstore - 16, 0);
- /* in3 = ps_strings */
- suword((char *)tf->tf_special.bspstore - 8,
- (u_int64_t)l->l_proc->p_psstr);
+ /* in3 = ps_strings */
+ suword((char *)tf->tf_special.bspstore - 8,
+ (uint64_t)l->l_proc->p_psstr);
}
@@ -855,12 +859,12 @@
}
void
-sendsig(const ksiginfo_t *ksi, const sigset_t *mask)
+sendsig_siginfo(const ksiginfo_t *ksi, const sigset_t *mask)
{
return;
}
-
-void
+
+void
cpu_upcall(struct lwp *l, int type, int nevents, int ninterrupted, void *sas, void *ap, void *sp, sa_upcall_t upcall)
{
return;
@@ -1,10 +1,10 @@
-/* $NetBSD: mainbus.c,v 1.4 2009/03/14 21:04:10 dsl Exp $ */
+/* $NetBSD: mainbus.c,v 1.5 2009/07/20 05:10:49 kiyohara Exp $ */
/*-
* Copyright (c) 2006 The NetBSD Foundation, Inc.
* All rights reserved.
*
- * Author:
+ * Author:
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -29,25 +29,31 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.4 2009/03/14 21:04:10 dsl Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.5 2009/07/20 05:10:49 kiyohara Exp $");
+#include "acpi.h"
#include <sys/param.h>
-#include <sys/systm.h>
#include <sys/device.h>
+#include <sys/errno.h>
-int mainbus_match(struct device *, struct cfdata *, void *);
-void mainbus_attach(struct device *, struct device *, void *);
+#include <machine/bus.h>
-CFATTACH_DECL(mainbus, sizeof(struct device),
+#include <dev/acpi/acpivar.h>
+
+
+static int mainbus_match(struct device *, struct cfdata *, void *);
+static void mainbus_attach(struct device *, struct device *, void *);
+
+CFATTACH_DECL_NEW(mainbus, sizeof(struct device),
mainbus_match, mainbus_attach, NULL, NULL);
/*
* Probe for the mainbus; always succeeds.
*/
-int
-mainbus_match(struct device *parent, struct cfdata *match, void *aux)
+static int
+mainbus_match(device_t parent, struct cfdata *match, void *aux)
{
return 1;
@@ -56,8 +62,29 @@
/*
* Attach the mainbus.
*/
-void
-mainbus_attach(struct device *parent, struct device *self, void *aux)
+static void
+mainbus_attach(device_t parent, device_t self, void *aux)
{
+#if NACPI > 0
+ struct acpibus_attach_args aaa;
+#endif
+
+ aprint_naive("\n");
+ aprint_normal("\n");
+
+#if NACPI > 0
+ acpi_probe();
+
+ aaa.aa_iot = IA64_BUS_SPACE_IO;
+ aaa.aa_memt = IA64_BUS_SPACE_MEM;
+ aaa.aa_pc = 0;
+ aaa.aa_pciflags =
+ PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
+ PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY |
+ PCI_FLAGS_MWI_OKAY;
+ aaa.aa_ic = 0;
+ config_found_ia(self, "acpibus", &aaa, 0);
+#endif
+
return;
}