Mon Nov 30 09:34:39 2009 UTC ()
sparc64_ipi_flush_ctx and sparc64_ipi_flush_all have been removed,
so remove its event counters as well.


(nakayama)
diff -r1.25 -r1.26 src/sys/arch/sparc64/include/intr.h
cvs diff -r1.25 -r1.26 src/sys/arch/sparc64/include/intr.h (expand / switch to unified diff)

--- src/sys/arch/sparc64/include/intr.h 2008/04/28 20:23:37 1.25
+++ src/sys/arch/sparc64/include/intr.h 2009/11/30 09:34:39 1.26
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: intr.h,v 1.25 2008/04/28 20:23:37 martin Exp $ */ 1/* $NetBSD: intr.h,v 1.26 2009/11/30 09:34:39 nakayama Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Paul Kranenburg. 8 * by Paul Kranenburg.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -65,23 +65,20 @@ int sparc64_ipi_halt_thiscpu (void *); @@ -65,23 +65,20 @@ int sparc64_ipi_halt_thiscpu (void *);
65int sparc64_ipi_pause_thiscpu (void *); 65int sparc64_ipi_pause_thiscpu (void *);
66void sparc64_do_pause(void); 66void sparc64_do_pause(void);
67void sparc64_ipi_drop_fpstate (void *); 67void sparc64_ipi_drop_fpstate (void *);
68void sparc64_ipi_save_fpstate (void *); 68void sparc64_ipi_save_fpstate (void *);
69void sparc64_ipi_nop (void *); 69void sparc64_ipi_nop (void *);
70void mp_halt_cpus (void); 70void mp_halt_cpus (void);
71void mp_pause_cpus (void); 71void mp_pause_cpus (void);
72void mp_resume_cpus (void); 72void mp_resume_cpus (void);
73int mp_cpu_is_paused (sparc64_cpuset_t); 73int mp_cpu_is_paused (sparc64_cpuset_t);
74void mp_resume_cpu(int); 74void mp_resume_cpu(int);
75#endif /* _LOCORE */ 75#endif /* _LOCORE */
76 76
77#define IPI_EVCNT_TLB_PTE 0 77#define IPI_EVCNT_TLB_PTE 0
78#define IPI_EVCNT_TLB_CTX 1 78#define IPI_EVCNT_FPU_SYNCH 1
79#define IPI_EVCNT_TLB_ALL 2 79#define IPI_EVCNT_FPU_FLUSH 2
80#define IPI_EVCNT_FPU_SYNCH 3 80#define IPI_EVCNT_NUM 3
81#define IPI_EVCNT_FPU_FLUSH 4 81#define IPI_EVCNT_NAMES { "TLB pte IPI", "FPU synch IPI", "FPU flush IPI" }
82#define IPI_EVCNT_NUM 5 
83#define IPI_EVCNT_NAMES { "TLB pte IPI", "TLB ctx IPI", "TLB all IPI", \ 
84 "FPU synch IPI", "FPU flush IPI" } 
85#endif 82#endif
86 83
87#endif /* _SPARC64_INTR_H_ */ 84#endif /* _SPARC64_INTR_H_ */