 @@ -1,14 +1,14 @@
-/*	$NetBSD: wdc.c,v 1.264 2011/08/28 09:32:21 christos Exp $ */
+/*	$NetBSD: wdc.c,v 1.265 2011/08/28 10:21:41 bouyer Exp $ */
 /*
  * Copyright (c) 1998, 2001, 2003 Manuel Bouyer.  All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
 @@ -48,27 +48,27 @@
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * CODE UNTESTED IN THE CURRENT REVISION:
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: wdc.c,v 1.264 2011/08/28 09:32:21 christos Exp $");
+__KERNEL_RCSID(0, "$NetBSD: wdc.c,v 1.265 2011/08/28 10:21:41 bouyer Exp $");
 #include "opt_ata.h"
 #include "opt_wdc.h"
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/kernel.h>
 #include <sys/conf.h>
 #include <sys/buf.h>
 #include <sys/device.h>
 #include <sys/malloc.h>
 #include <sys/syslog.h>
 #include <sys/proc.h>
 @@ -289,29 +289,27 @@ wdc_drvprobe(struct ata_channel *chp)
+{
 	struct ataparams params; /* XXX: large struct */
 	struct atac_softc *atac = chp->ch_atac;
 	struct wdc_softc *wdc = CHAN_TO_WDC(chp);
 	struct wdc_regs *wdr = &wdc->regs[chp->ch_channel];
 	u_int8_t st0 = 0, st1 = 0;
 	int i, j, error, s;
 	if (wdcprobe1(chp, 0) == 0) {
 		/* No drives, abort the attach here. */
 		return;
+	}
 #ifndef WDC_NO_IDS
 	s = splbio();
 #endif
 	/* for ATA/OLD drives, wait for DRDY, 3s timeout */
 	for (i = 0; i < mstohz(3000); i++) {
 		/*
 		 * select drive 1 first, so that master is selected on
 		 * exit from the loop
 		 */
 		if (chp->ch_drive[1].drive_flags & (DRIVE_ATA|DRIVE_OLD)) {
 			if (wdc->select)
 				wdc->select(chp,1);
 			bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh],
 , WDSD_IBM | 0x10);
 			delay(10);	/* 400ns delay */
 			st1 = bus_space_read_1(wdr->cmd_iot,
 @@ -330,32 +328,30 @@ wdc_drvprobe(struct ata_channel *chp)
 		if (((chp->ch_drive[0].drive_flags & (DRIVE_ATA|DRIVE_OLD))
 			== 0 ||
 		    (st0 & WDCS_DRDY)) &&
 		    ((chp->ch_drive[1].drive_flags & (DRIVE_ATA|DRIVE_OLD))
 			== 0 ||
 		    (st1 & WDCS_DRDY)))
 			break;
 #ifdef WDC_NO_IDS
 		/* cannot tsleep here (can't enable IPL_BIO interrups),
 		 * delay instead
 		 */
 		delay(1000000 / hz);
 #else
 		tsleep(&params, PRIBIO, "atadrdy", 1);
 	s = splbio();
 #endif
+	}
 	if ((st0 & WDCS_DRDY) == 0)
 		chp->ch_drive[0].drive_flags &= ~(DRIVE_ATA|DRIVE_OLD);
 	if ((st1 & WDCS_DRDY) == 0)
 		chp->ch_drive[1].drive_flags &= ~(DRIVE_ATA|DRIVE_OLD);
 	splx(s);
 	ATADEBUG_PRINT(("%s:%d: wait DRDY st0 0x%x st1 0x%x\n",
 	    device_xname(atac->atac_dev),
 	    chp->ch_channel, st0, st1), DEBUG_PROBE);
 	/* Wait a bit, some devices are weird just after a reset. */
 	delay(5000);
 @@ -1089,27 +1085,26 @@ wdc_do_reset(struct ata_channel *chp, in
+}
 static int
 __wdcwait_reset(struct ata_channel *chp, int drv_mask, int poll)
+{
 	struct wdc_softc *wdc = CHAN_TO_WDC(chp);
 	struct wdc_regs *wdr = &wdc->regs[chp->ch_channel];
 	int timeout, nloop;
 	u_int8_t st0 = 0, st1 = 0;
 #ifdef ATADEBUG
 	u_int8_t sc0 = 0, sn0 = 0, cl0 = 0, ch0 = 0;
 	u_int8_t sc1 = 0, sn1 = 0, cl1 = 0, ch1 = 0;
 #endif
 	KASSERT(poll == RESET_POLL);
 	if (poll)
 		nloop = WDCNDELAY_RST;
 	else
 		nloop = WDC_RESET_WAIT * hz / 1000;
 	/* wait for BSY to deassert */
 	for (timeout = 0; timeout < nloop; timeout++) {
 		if ((drv_mask & 0x01) != 0) {
 			if (wdc->select)
 				wdc->select(chp,0);
 			bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh],
 , WDSD_IBM); /* master */
 			delay(10);
 			st0 = bus_space_read_1(wdr->cmd_iot,
 @@ -1498,33 +1493,36 @@ __wdccommand_intr(struct ata_channel *ch
 		 * Historically it's what we have always done so keeping it
 		 * here ensure binary backward compatibility.
 		 */
 		 drive_flags = DRIVE_NOSTREAM |
 				chp->ch_drive[xfer->c_drive].drive_flags;
 	} else {
 		/*
 		 * Other data structure are opaque and should be transfered
 		 * as is.
 		 */
 		drive_flags = chp->ch_drive[xfer->c_drive].drive_flags;
+	}
-#ifndef WDC_NO_IDS
+#ifdef WDC_NO_IDS
 	wflags = AT_POLL;
 #else
 	if ((ata_c->flags & (AT_WAIT | AT_POLL)) == (AT_WAIT | AT_POLL)) {
 		/* both wait and poll, we can tsleep here */
 		wflags = AT_WAIT | AT_POLL;
-	} else
+	} else {
 #endif
 		wflags = AT_POLL;
+	}
 #endif
  again:
 	ATADEBUG_PRINT(("__wdccommand_intr %s:%d:%d\n",
 	    device_xname(chp->ch_atac->atac_dev), chp->ch_channel,
 	    xfer->c_drive), DEBUG_INTR);
 	/*
 	 * after a ATAPI_SOFT_RESET, the device will have released the bus.
 	 * Reselect again, it doesn't hurt for others commands, and the time
 	 * penalty for the extra regiter write is acceptable,
 	 * wdc_exec_command() isn't called often (mosly for autoconfig)
 	 */
 	bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0,
 	    WDSD_IBM | (xfer->c_drive << 4));