Wed Jun 12 00:59:50 2013 UTC ()
Don't attach a9tmr if the CPU supports the generic timer.


(matt)
diff -r1.4 -r1.5 src/sys/arch/arm/cortex/a9tmr.c

cvs diff -r1.4 -r1.5 src/sys/arch/arm/cortex/a9tmr.c (expand / switch to unified diff)

--- src/sys/arch/arm/cortex/a9tmr.c 2012/11/29 17:36:56 1.4
+++ src/sys/arch/arm/cortex/a9tmr.c 2013/06/12 00:59:50 1.5
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: a9tmr.c,v 1.4 2012/11/29 17:36:56 matt Exp $ */ 1/* $NetBSD: a9tmr.c,v 1.5 2013/06/12 00:59:50 matt Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2012 The NetBSD Foundation, Inc. 4 * Copyright (c) 2012 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas 8 * by Matt Thomas
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -20,27 +20,27 @@ @@ -20,27 +20,27 @@
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32#include <sys/cdefs.h> 32#include <sys/cdefs.h>
33__KERNEL_RCSID(0, "$NetBSD: a9tmr.c,v 1.4 2012/11/29 17:36:56 matt Exp $"); 33__KERNEL_RCSID(0, "$NetBSD: a9tmr.c,v 1.5 2013/06/12 00:59:50 matt Exp $");
34 34
35#include <sys/param.h> 35#include <sys/param.h>
36#include <sys/bus.h> 36#include <sys/bus.h>
37#include <sys/device.h> 37#include <sys/device.h>
38#include <sys/intr.h> 38#include <sys/intr.h>
39#include <sys/kernel.h> 39#include <sys/kernel.h>
40#include <sys/proc.h> 40#include <sys/proc.h>
41#include <sys/systm.h> 41#include <sys/systm.h>
42#include <sys/timetc.h> 42#include <sys/timetc.h>
43 43
44#include <prop/proplib.h> 44#include <prop/proplib.h>
45 45
46#include <arm/cortex/a9tmr_reg.h> 46#include <arm/cortex/a9tmr_reg.h>
@@ -82,26 +82,29 @@ a9tmr_global_write(struct a9tmr_softc *s @@ -82,26 +82,29 @@ a9tmr_global_write(struct a9tmr_softc *s
82 bus_space_write_4(sc->sc_memt, sc->sc_global_memh, o, v); 82 bus_space_write_4(sc->sc_memt, sc->sc_global_memh, o, v);
83} 83}
84 84
85 85
86/* ARGSUSED */ 86/* ARGSUSED */
87static int 87static int
88a9tmr_match(device_t parent, cfdata_t cf, void *aux) 88a9tmr_match(device_t parent, cfdata_t cf, void *aux)
89{ 89{
90 struct mpcore_attach_args * const mpcaa = aux; 90 struct mpcore_attach_args * const mpcaa = aux;
91 91
92 if (a9tmr_sc.sc_dev != NULL) 92 if (a9tmr_sc.sc_dev != NULL)
93 return 0; 93 return 0;
94 94
 95 if ((armreg_pfr1_read() & ARM_PFR1_GTIMER_MASK) != 0)
 96 return 0;
 97
95 if (!CPU_ID_CORTEX_A9_P(curcpu()->ci_arm_cpuid)) 98 if (!CPU_ID_CORTEX_A9_P(curcpu()->ci_arm_cpuid))
96 return 0; 99 return 0;
97 100
98 if (strcmp(mpcaa->mpcaa_name, cf->cf_name) != 0) 101 if (strcmp(mpcaa->mpcaa_name, cf->cf_name) != 0)
99 return 0; 102 return 0;
100 103
101 /* 104 /*
102 * This isn't present on UP A9s (since CBAR isn't present). 105 * This isn't present on UP A9s (since CBAR isn't present).
103 */ 106 */
104 uint32_t mpidr = armreg_mpidr_read(); 107 uint32_t mpidr = armreg_mpidr_read();
105 if (mpidr == 0 || (mpidr & MPIDR_U)) 108 if (mpidr == 0 || (mpidr & MPIDR_U))
106 return 0; 109 return 0;
107 110