Wed Jun 12 02:51:43 2013 UTC ()
regen.


(msaitoh)
diff -r1.118 -r1.119 src/sys/dev/mii/miidevs.h
diff -r1.106 -r1.107 src/sys/dev/mii/miidevs_data.h
cvs diff -r1.118 -r1.119 src/sys/dev/mii/miidevs.h (expand / switch to unified diff)

--- src/sys/dev/mii/miidevs.h 2013/06/02 09:13:27 1.118
+++ src/sys/dev/mii/miidevs.h 2013/06/12 02:51:43 1.119
@@ -1,20 +1,20 @@ @@ -1,20 +1,20 @@
1/* $NetBSD: miidevs.h,v 1.118 2013/06/02 09:13:27 msaitoh Exp $ */ 1/* $NetBSD: miidevs.h,v 1.119 2013/06/12 02:51:43 msaitoh Exp $ */
2 2
3/* 3/*
4 * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT. 4 * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
5 * 5 *
6 * generated from: 6 * generated from:
7 * NetBSD: miidevs,v 1.115 2013/06/02 09:13:07 msaitoh Exp 7 * NetBSD: miidevs,v 1.116 2013/06/12 02:51:16 msaitoh Exp
8 */ 8 */
9 9
10/*- 10/*-
11 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 11 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
12 * All rights reserved. 12 * All rights reserved.
13 * 13 *
14 * This code is derived from software contributed to The NetBSD Foundation 14 * This code is derived from software contributed to The NetBSD Foundation
15 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 15 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
16 * NASA Ames Research Center. 16 * NASA Ames Research Center.
17 * 17 *
18 * Redistribution and use in source and binary forms, with or without 18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions 19 * modification, are permitted provided that the following conditions
20 * are met: 20 * are met:
@@ -275,28 +275,34 @@ @@ -275,28 +275,34 @@
275#define MII_MODEL_xxCICADA_VSC8244 0x002c 275#define MII_MODEL_xxCICADA_VSC8244 0x002c
276#define MII_STR_xxCICADA_VSC8244 "Vitesse VSC8244 Quad 10/100/1000BASE-T PHY" 276#define MII_STR_xxCICADA_VSC8244 "Vitesse VSC8244 Quad 10/100/1000BASE-T PHY"
277#define MII_MODEL_xxCICADA_CS8201B 0x0021 277#define MII_MODEL_xxCICADA_CS8201B 0x0021
278#define MII_STR_xxCICADA_CS8201B "Cicada CS8201 10/100/1000TX PHY" 278#define MII_STR_xxCICADA_CS8201B "Cicada CS8201 10/100/1000TX PHY"
279 279
280/* Davicom Semiconductor PHYs */ 280/* Davicom Semiconductor PHYs */
281/* AMD Am79C873 seems to be a relabeled DM9101 */ 281/* AMD Am79C873 seems to be a relabeled DM9101 */
282#define MII_MODEL_xxDAVICOM_DM9101 0x0000 282#define MII_MODEL_xxDAVICOM_DM9101 0x0000
283#define MII_STR_xxDAVICOM_DM9101 "DM9101 (AMD Am79C873) 10/100 media interface" 283#define MII_STR_xxDAVICOM_DM9101 "DM9101 (AMD Am79C873) 10/100 media interface"
284#define MII_MODEL_xxDAVICOM_DM9102 0x0004 284#define MII_MODEL_xxDAVICOM_DM9102 0x0004
285#define MII_STR_xxDAVICOM_DM9102 "DM9102 10/100 media interface" 285#define MII_STR_xxDAVICOM_DM9102 "DM9102 10/100 media interface"
286 286
287/* IC Plus Corp. PHYs */ 287/* IC Plus Corp. PHYs */
 288#define MII_MODEL_ICPLUS_IP100 0x0004
 289#define MII_STR_ICPLUS_IP100 "IP100 10/100 PHY"
288#define MII_MODEL_ICPLUS_IP101 0x0005 290#define MII_MODEL_ICPLUS_IP101 0x0005
289#define MII_STR_ICPLUS_IP101 "IP101 10/100 PHY" 291#define MII_STR_ICPLUS_IP101 "IP101 10/100 PHY"
 292#define MII_MODEL_ICPLUS_IP1000A 0x0008
 293#define MII_STR_ICPLUS_IP1000A "IP1000A 10/100/1000 PHY"
 294#define MII_MODEL_ICPLUS_IP1001 0x0019
 295#define MII_STR_ICPLUS_IP1001 "IP1001 10/100/1000 PHY"
290 296
291/* Integrated Circuit Systems PHYs */ 297/* Integrated Circuit Systems PHYs */
292#define MII_MODEL_ICS_1889 0x0001 298#define MII_MODEL_ICS_1889 0x0001
293#define MII_STR_ICS_1889 "ICS1889 10/100 media interface" 299#define MII_STR_ICS_1889 "ICS1889 10/100 media interface"
294#define MII_MODEL_ICS_1890 0x0002 300#define MII_MODEL_ICS_1890 0x0002
295#define MII_STR_ICS_1890 "ICS1890 10/100 media interface" 301#define MII_STR_ICS_1890 "ICS1890 10/100 media interface"
296#define MII_MODEL_ICS_1892 0x0003 302#define MII_MODEL_ICS_1892 0x0003
297#define MII_STR_ICS_1892 "ICS1892 10/100 media interface" 303#define MII_STR_ICS_1892 "ICS1892 10/100 media interface"
298#define MII_MODEL_ICS_1893 0x0004 304#define MII_MODEL_ICS_1893 0x0004
299#define MII_STR_ICS_1893 "ICS1893 10/100 media interface" 305#define MII_STR_ICS_1893 "ICS1893 10/100 media interface"
300 306
301/* Intel PHYs */ 307/* Intel PHYs */
302#define MII_MODEL_xxINTEL_I82553 0x0000 308#define MII_MODEL_xxINTEL_I82553 0x0000
cvs diff -r1.106 -r1.107 src/sys/dev/mii/miidevs_data.h (expand / switch to unified diff)

--- src/sys/dev/mii/miidevs_data.h 2013/06/02 09:13:27 1.106
+++ src/sys/dev/mii/miidevs_data.h 2013/06/12 02:51:43 1.107
@@ -1,20 +1,20 @@ @@ -1,20 +1,20 @@
1/* $NetBSD: miidevs_data.h,v 1.106 2013/06/02 09:13:27 msaitoh Exp $ */ 1/* $NetBSD: miidevs_data.h,v 1.107 2013/06/12 02:51:43 msaitoh Exp $ */
2 2
3/* 3/*
4 * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT. 4 * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
5 * 5 *
6 * generated from: 6 * generated from:
7 * NetBSD: miidevs,v 1.115 2013/06/02 09:13:07 msaitoh Exp 7 * NetBSD: miidevs,v 1.116 2013/06/12 02:51:16 msaitoh Exp
8 */ 8 */
9 9
10/*- 10/*-
11 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 11 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
12 * All rights reserved. 12 * All rights reserved.
13 * 13 *
14 * This code is derived from software contributed to The NetBSD Foundation 14 * This code is derived from software contributed to The NetBSD Foundation
15 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 15 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
16 * NASA Ames Research Center. 16 * NASA Ames Research Center.
17 * 17 *
18 * Redistribution and use in source and binary forms, with or without 18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions 19 * modification, are permitted provided that the following conditions
20 * are met: 20 * are met:
@@ -99,27 +99,30 @@ struct mii_knowndev mii_knowndevs[] = { @@ -99,27 +99,30 @@ struct mii_knowndev mii_knowndevs[] = {
99 { MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM57765, MII_STR_BROADCOM3_BCM57765 }, 99 { MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM57765, MII_STR_BROADCOM3_BCM57765 },
100 { MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM5720C, MII_STR_BROADCOM3_BCM5720C }, 100 { MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM5720C, MII_STR_BROADCOM3_BCM5720C },
101 { MII_OUI_xxBROADCOM_ALT1, MII_MODEL_xxBROADCOM_ALT1_BCM5906, MII_STR_xxBROADCOM_ALT1_BCM5906 }, 101 { MII_OUI_xxBROADCOM_ALT1, MII_MODEL_xxBROADCOM_ALT1_BCM5906, MII_STR_xxBROADCOM_ALT1_BCM5906 },
102 { MII_OUI_CICADA, MII_MODEL_CICADA_CS8201, MII_STR_CICADA_CS8201 }, 102 { MII_OUI_CICADA, MII_MODEL_CICADA_CS8201, MII_STR_CICADA_CS8201 },
103 { MII_OUI_CICADA, MII_MODEL_CICADA_CS8204, MII_STR_CICADA_CS8204 }, 103 { MII_OUI_CICADA, MII_MODEL_CICADA_CS8204, MII_STR_CICADA_CS8204 },
104 { MII_OUI_CICADA, MII_MODEL_CICADA_VSC8211, MII_STR_CICADA_VSC8211 }, 104 { MII_OUI_CICADA, MII_MODEL_CICADA_VSC8211, MII_STR_CICADA_VSC8211 },
105 { MII_OUI_CICADA, MII_MODEL_CICADA_CS8201A, MII_STR_CICADA_CS8201A }, 105 { MII_OUI_CICADA, MII_MODEL_CICADA_CS8201A, MII_STR_CICADA_CS8201A },
106 { MII_OUI_CICADA, MII_MODEL_CICADA_CS8201B, MII_STR_CICADA_CS8201B }, 106 { MII_OUI_CICADA, MII_MODEL_CICADA_CS8201B, MII_STR_CICADA_CS8201B },
107 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8221, MII_STR_xxCICADA_VSC8221 }, 107 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8221, MII_STR_xxCICADA_VSC8221 },
108 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8244, MII_STR_xxCICADA_VSC8244 }, 108 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8244, MII_STR_xxCICADA_VSC8244 },
109 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_CS8201B, MII_STR_xxCICADA_CS8201B }, 109 { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_CS8201B, MII_STR_xxCICADA_CS8201B },
110 { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9101, MII_STR_xxDAVICOM_DM9101 }, 110 { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9101, MII_STR_xxDAVICOM_DM9101 },
111 { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9102, MII_STR_xxDAVICOM_DM9102 }, 111 { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9102, MII_STR_xxDAVICOM_DM9102 },
 112 { MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP100, MII_STR_ICPLUS_IP100 },
112 { MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP101, MII_STR_ICPLUS_IP101 }, 113 { MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP101, MII_STR_ICPLUS_IP101 },
 114 { MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP1000A, MII_STR_ICPLUS_IP1000A },
 115 { MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP1001, MII_STR_ICPLUS_IP1001 },
113 { MII_OUI_ICS, MII_MODEL_ICS_1889, MII_STR_ICS_1889 }, 116 { MII_OUI_ICS, MII_MODEL_ICS_1889, MII_STR_ICS_1889 },
114 { MII_OUI_ICS, MII_MODEL_ICS_1890, MII_STR_ICS_1890 }, 117 { MII_OUI_ICS, MII_MODEL_ICS_1890, MII_STR_ICS_1890 },
115 { MII_OUI_ICS, MII_MODEL_ICS_1892, MII_STR_ICS_1892 }, 118 { MII_OUI_ICS, MII_MODEL_ICS_1892, MII_STR_ICS_1892 },
116 { MII_OUI_ICS, MII_MODEL_ICS_1893, MII_STR_ICS_1893 }, 119 { MII_OUI_ICS, MII_MODEL_ICS_1893, MII_STR_ICS_1893 },
117 { MII_OUI_xxINTEL, MII_MODEL_xxINTEL_I82553, MII_STR_xxINTEL_I82553 }, 120 { MII_OUI_xxINTEL, MII_MODEL_xxINTEL_I82553, MII_STR_xxINTEL_I82553 },
118 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82555, MII_STR_yyINTEL_I82555 }, 121 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82555, MII_STR_yyINTEL_I82555 },
119 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82562EH, MII_STR_yyINTEL_I82562EH }, 122 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82562EH, MII_STR_yyINTEL_I82562EH },
120 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82562G, MII_STR_yyINTEL_I82562G }, 123 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82562G, MII_STR_yyINTEL_I82562G },
121 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82562EM, MII_STR_yyINTEL_I82562EM }, 124 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82562EM, MII_STR_yyINTEL_I82562EM },
122 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82562ET, MII_STR_yyINTEL_I82562ET }, 125 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82562ET, MII_STR_yyINTEL_I82562ET },
123 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82553, MII_STR_yyINTEL_I82553 }, 126 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82553, MII_STR_yyINTEL_I82553 },
124 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82566, MII_STR_yyINTEL_I82566 }, 127 { MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82566, MII_STR_yyINTEL_I82566 },
125 { MII_OUI_INTEL, MII_MODEL_INTEL_I82577, MII_STR_INTEL_I82577 }, 128 { MII_OUI_INTEL, MII_MODEL_INTEL_I82577, MII_STR_INTEL_I82577 },