| @@ -462,55 +462,59 @@ out_unlock: | | | @@ -462,55 +462,59 @@ out_unlock: |
462 | } | | 462 | } |
463 | | | 463 | |
464 | static void vlv_init_dpio(struct drm_device *dev) | | 464 | static void vlv_init_dpio(struct drm_device *dev) |
465 | { | | 465 | { |
466 | struct drm_i915_private *dev_priv = dev->dev_private; | | 466 | struct drm_i915_private *dev_priv = dev->dev_private; |
467 | | | 467 | |
468 | /* Reset the DPIO config */ | | 468 | /* Reset the DPIO config */ |
469 | I915_WRITE(DPIO_CTL, 0); | | 469 | I915_WRITE(DPIO_CTL, 0); |
470 | POSTING_READ(DPIO_CTL); | | 470 | POSTING_READ(DPIO_CTL); |
471 | I915_WRITE(DPIO_CTL, 1); | | 471 | I915_WRITE(DPIO_CTL, 1); |
472 | POSTING_READ(DPIO_CTL); | | 472 | POSTING_READ(DPIO_CTL); |
473 | } | | 473 | } |
474 | | | 474 | |
| | | 475 | #ifndef __NetBSD__ /* XXX dmi hack */ |
475 | static int intel_dual_link_lvds_callback(const struct dmi_system_id *id) | | 476 | static int intel_dual_link_lvds_callback(const struct dmi_system_id *id) |
476 | { | | 477 | { |
477 | DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident); | | 478 | DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident); |
478 | return 1; | | 479 | return 1; |
479 | } | | 480 | } |
480 | | | 481 | |
481 | static const struct dmi_system_id intel_dual_link_lvds[] = { | | 482 | static const struct dmi_system_id intel_dual_link_lvds[] = { |
482 | { | | 483 | { |
483 | .callback = intel_dual_link_lvds_callback, | | 484 | .callback = intel_dual_link_lvds_callback, |
484 | .ident = "Apple MacBook Pro (Core i5/i7 Series)", | | 485 | .ident = "Apple MacBook Pro (Core i5/i7 Series)", |
485 | .matches = { | | 486 | .matches = { |
486 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), | | 487 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), |
487 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"), | | 488 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"), |
488 | }, | | 489 | }, |
489 | }, | | 490 | }, |
490 | { } /* terminating entry */ | | 491 | { } /* terminating entry */ |
491 | }; | | 492 | }; |
| | | 493 | #endif |
492 | | | 494 | |
493 | static bool is_dual_link_lvds(struct drm_i915_private *dev_priv, | | 495 | static bool is_dual_link_lvds(struct drm_i915_private *dev_priv, |
494 | unsigned int reg) | | 496 | unsigned int reg) |
495 | { | | 497 | { |
496 | unsigned int val; | | 498 | unsigned int val; |
497 | | | 499 | |
498 | /* use the module option value if specified */ | | 500 | /* use the module option value if specified */ |
499 | if (i915_lvds_channel_mode > 0) | | 501 | if (i915_lvds_channel_mode > 0) |
500 | return i915_lvds_channel_mode == 2; | | 502 | return i915_lvds_channel_mode == 2; |
501 | | | 503 | |
| | | 504 | #ifndef __NetBSD__ /* XXX dmi hack */ |
502 | if (dmi_check_system(intel_dual_link_lvds)) | | 505 | if (dmi_check_system(intel_dual_link_lvds)) |
503 | return true; | | 506 | return true; |
| | | 507 | #endif |
504 | | | 508 | |
505 | if (dev_priv->lvds_val) | | 509 | if (dev_priv->lvds_val) |
506 | val = dev_priv->lvds_val; | | 510 | val = dev_priv->lvds_val; |
507 | else { | | 511 | else { |
508 | /* BIOS should set the proper LVDS register value at boot, but | | 512 | /* BIOS should set the proper LVDS register value at boot, but |
509 | * in reality, it doesn't set the value when the lid is closed; | | 513 | * in reality, it doesn't set the value when the lid is closed; |
510 | * we need to check "the value to be set" in VBT when LVDS | | 514 | * we need to check "the value to be set" in VBT when LVDS |
511 | * register is uninitialized. | | 515 | * register is uninitialized. |
512 | */ | | 516 | */ |
513 | val = I915_READ(reg); | | 517 | val = I915_READ(reg); |
514 | if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED))) | | 518 | if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED))) |
515 | val = dev_priv->bios_lvds_val; | | 519 | val = dev_priv->bios_lvds_val; |
516 | dev_priv->lvds_val = val; | | 520 | dev_priv->lvds_val = val; |
| @@ -8787,26 +8791,27 @@ static void intel_init_display(struct dr | | | @@ -8787,26 +8791,27 @@ static void intel_init_display(struct dr |
8787 | case 5: | | 8791 | case 5: |
8788 | dev_priv->display.queue_flip = intel_gen4_queue_flip; | | 8792 | dev_priv->display.queue_flip = intel_gen4_queue_flip; |
8789 | break; | | 8793 | break; |
8790 | | | 8794 | |
8791 | case 6: | | 8795 | case 6: |
8792 | dev_priv->display.queue_flip = intel_gen6_queue_flip; | | 8796 | dev_priv->display.queue_flip = intel_gen6_queue_flip; |
8793 | break; | | 8797 | break; |
8794 | case 7: | | 8798 | case 7: |
8795 | dev_priv->display.queue_flip = intel_gen7_queue_flip; | | 8799 | dev_priv->display.queue_flip = intel_gen7_queue_flip; |
8796 | break; | | 8800 | break; |
8797 | } | | 8801 | } |
8798 | } | | 8802 | } |
8799 | | | 8803 | |
| | | 8804 | #ifndef __NetBSD__ /* XXX dmi hack */ |
8800 | /* | | 8805 | /* |
8801 | * Some BIOSes insist on assuming the GPU's pipe A is enabled at suspend, | | 8806 | * Some BIOSes insist on assuming the GPU's pipe A is enabled at suspend, |
8802 | * resume, or other times. This quirk makes sure that's the case for | | 8807 | * resume, or other times. This quirk makes sure that's the case for |
8803 | * affected systems. | | 8808 | * affected systems. |
8804 | */ | | 8809 | */ |
8805 | static void quirk_pipea_force(struct drm_device *dev) | | 8810 | static void quirk_pipea_force(struct drm_device *dev) |
8806 | { | | 8811 | { |
8807 | struct drm_i915_private *dev_priv = dev->dev_private; | | 8812 | struct drm_i915_private *dev_priv = dev->dev_private; |
8808 | | | 8813 | |
8809 | dev_priv->quirks |= QUIRK_PIPEA_FORCE; | | 8814 | dev_priv->quirks |= QUIRK_PIPEA_FORCE; |
8810 | DRM_INFO("applying pipe a force quirk\n"); | | 8815 | DRM_INFO("applying pipe a force quirk\n"); |
8811 | } | | 8816 | } |
8812 | | | 8817 | |
| @@ -8900,26 +8905,27 @@ static void intel_init_quirks(struct drm | | | @@ -8900,26 +8905,27 @@ static void intel_init_quirks(struct drm |
8900 | | | 8905 | |
8901 | if (d->device == q->device && | | 8906 | if (d->device == q->device && |
8902 | (d->subsystem_vendor == q->subsystem_vendor || | | 8907 | (d->subsystem_vendor == q->subsystem_vendor || |
8903 | q->subsystem_vendor == PCI_ANY_ID) && | | 8908 | q->subsystem_vendor == PCI_ANY_ID) && |
8904 | (d->subsystem_device == q->subsystem_device || | | 8909 | (d->subsystem_device == q->subsystem_device || |
8905 | q->subsystem_device == PCI_ANY_ID)) | | 8910 | q->subsystem_device == PCI_ANY_ID)) |
8906 | q->hook(dev); | | 8911 | q->hook(dev); |
8907 | } | | 8912 | } |
8908 | for (i = 0; i < ARRAY_SIZE(intel_dmi_quirks); i++) { | | 8913 | for (i = 0; i < ARRAY_SIZE(intel_dmi_quirks); i++) { |
8909 | if (dmi_check_system(*intel_dmi_quirks[i].dmi_id_list) != 0) | | 8914 | if (dmi_check_system(*intel_dmi_quirks[i].dmi_id_list) != 0) |
8910 | intel_dmi_quirks[i].hook(dev); | | 8915 | intel_dmi_quirks[i].hook(dev); |
8911 | } | | 8916 | } |
8912 | } | | 8917 | } |
| | | 8918 | #endif |
8913 | | | 8919 | |
8914 | /* Disable the VGA plane that we never use */ | | 8920 | /* Disable the VGA plane that we never use */ |
8915 | static void i915_disable_vga(struct drm_device *dev) | | 8921 | static void i915_disable_vga(struct drm_device *dev) |
8916 | { | | 8922 | { |
8917 | struct drm_i915_private *dev_priv = dev->dev_private; | | 8923 | struct drm_i915_private *dev_priv = dev->dev_private; |
8918 | u8 sr1; | | 8924 | u8 sr1; |
8919 | u32 vga_reg; | | 8925 | u32 vga_reg; |
8920 | | | 8926 | |
8921 | if (HAS_PCH_SPLIT(dev)) | | 8927 | if (HAS_PCH_SPLIT(dev)) |
8922 | vga_reg = CPU_VGACNTRL; | | 8928 | vga_reg = CPU_VGACNTRL; |
8923 | else | | 8929 | else |
8924 | vga_reg = VGACNTRL; | | 8930 | vga_reg = VGACNTRL; |
8925 | | | 8931 | |
| @@ -8955,27 +8961,29 @@ void intel_modeset_init(struct drm_devic | | | @@ -8955,27 +8961,29 @@ void intel_modeset_init(struct drm_devic |
8955 | struct drm_i915_private *dev_priv = dev->dev_private; | | 8961 | struct drm_i915_private *dev_priv = dev->dev_private; |
8956 | int i, ret; | | 8962 | int i, ret; |
8957 | | | 8963 | |
8958 | drm_mode_config_init(dev); | | 8964 | drm_mode_config_init(dev); |
8959 | | | 8965 | |
8960 | dev->mode_config.min_width = 0; | | 8966 | dev->mode_config.min_width = 0; |
8961 | dev->mode_config.min_height = 0; | | 8967 | dev->mode_config.min_height = 0; |
8962 | | | 8968 | |
8963 | dev->mode_config.preferred_depth = 24; | | 8969 | dev->mode_config.preferred_depth = 24; |
8964 | dev->mode_config.prefer_shadow = 1; | | 8970 | dev->mode_config.prefer_shadow = 1; |
8965 | | | 8971 | |
8966 | dev->mode_config.funcs = &intel_mode_funcs; | | 8972 | dev->mode_config.funcs = &intel_mode_funcs; |
8967 | | | 8973 | |
| | | 8974 | #ifndef __NetBSD__ /* XXX dmi hack */ |
8968 | intel_init_quirks(dev); | | 8975 | intel_init_quirks(dev); |
| | | 8976 | #endif |
8969 | | | 8977 | |
8970 | intel_init_pm(dev); | | 8978 | intel_init_pm(dev); |
8971 | | | 8979 | |
8972 | intel_init_display(dev); | | 8980 | intel_init_display(dev); |
8973 | | | 8981 | |
8974 | if (IS_GEN2(dev)) { | | 8982 | if (IS_GEN2(dev)) { |
8975 | dev->mode_config.max_width = 2048; | | 8983 | dev->mode_config.max_width = 2048; |
8976 | dev->mode_config.max_height = 2048; | | 8984 | dev->mode_config.max_height = 2048; |
8977 | } else if (IS_GEN3(dev)) { | | 8985 | } else if (IS_GEN3(dev)) { |
8978 | dev->mode_config.max_width = 4096; | | 8986 | dev->mode_config.max_width = 4096; |
8979 | dev->mode_config.max_height = 4096; | | 8987 | dev->mode_config.max_height = 4096; |
8980 | } else { | | 8988 | } else { |
8981 | dev->mode_config.max_width = 8192; | | 8989 | dev->mode_config.max_width = 8192; |