add support for enabling the GPUdiff -r1.26 -r1.27 src/sys/arch/arm/nvidia/tegra_car.c
(jmcneill)
--- src/sys/arch/arm/nvidia/Attic/tegra_car.c 2015/08/01 21:20:11 1.26
+++ src/sys/arch/arm/nvidia/Attic/tegra_car.c 2015/10/17 21:16:09 1.27
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: tegra_car.c,v 1.26 2015/08/01 21:20:11 jmcneill Exp $ */ | 1 | /* $NetBSD: tegra_car.c,v 1.27 2015/10/17 21:16:09 jmcneill Exp $ */ | |
2 | 2 | |||
3 | /*- | 3 | /*- | |
4 | * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> | 4 | * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> | |
5 | * All rights reserved. | 5 | * All rights reserved. | |
6 | * | 6 | * | |
7 | * Redistribution and use in source and binary forms, with or without | 7 | * Redistribution and use in source and binary forms, with or without | |
8 | * modification, are permitted provided that the following conditions | 8 | * modification, are permitted provided that the following conditions | |
9 | * are met: | 9 | * are met: | |
10 | * 1. Redistributions of source code must retain the above copyright | 10 | * 1. Redistributions of source code must retain the above copyright | |
11 | * notice, this list of conditions and the following disclaimer. | 11 | * notice, this list of conditions and the following disclaimer. | |
12 | * 2. Redistributions in binary form must reproduce the above copyright | 12 | * 2. Redistributions in binary form must reproduce the above copyright | |
13 | * notice, this list of conditions and the following disclaimer in the | 13 | * notice, this list of conditions and the following disclaimer in the | |
14 | * documentation and/or other materials provided with the distribution. | 14 | * documentation and/or other materials provided with the distribution. | |
@@ -19,27 +19,27 @@ | @@ -19,27 +19,27 @@ | |||
19 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | 19 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | |
20 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | 20 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | |
21 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | 21 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | |
22 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED | 22 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED | |
23 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | 23 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
24 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | 24 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
25 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | 25 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
26 | * SUCH DAMAGE. | 26 | * SUCH DAMAGE. | |
27 | */ | 27 | */ | |
28 | 28 | |||
29 | #include "locators.h" | 29 | #include "locators.h" | |
30 | 30 | |||
31 | #include <sys/cdefs.h> | 31 | #include <sys/cdefs.h> | |
32 | __KERNEL_RCSID(0, "$NetBSD: tegra_car.c,v 1.26 2015/08/01 21:20:11 jmcneill Exp $"); | 32 | __KERNEL_RCSID(0, "$NetBSD: tegra_car.c,v 1.27 2015/10/17 21:16:09 jmcneill Exp $"); | |
33 | 33 | |||
34 | #include <sys/param.h> | 34 | #include <sys/param.h> | |
35 | #include <sys/bus.h> | 35 | #include <sys/bus.h> | |
36 | #include <sys/device.h> | 36 | #include <sys/device.h> | |
37 | #include <sys/intr.h> | 37 | #include <sys/intr.h> | |
38 | #include <sys/systm.h> | 38 | #include <sys/systm.h> | |
39 | #include <sys/kernel.h> | 39 | #include <sys/kernel.h> | |
40 | #include <sys/rndpool.h> | 40 | #include <sys/rndpool.h> | |
41 | #include <sys/rndsource.h> | 41 | #include <sys/rndsource.h> | |
42 | 42 | |||
43 | #include <arm/nvidia/tegra_reg.h> | 43 | #include <arm/nvidia/tegra_reg.h> | |
44 | #include <arm/nvidia/tegra_carreg.h> | 44 | #include <arm/nvidia/tegra_carreg.h> | |
45 | #include <arm/nvidia/tegra_pmcreg.h> | 45 | #include <arm/nvidia/tegra_pmcreg.h> | |
@@ -821,13 +821,42 @@ tegra_car_wdt_enable(u_int timer, bool e | @@ -821,13 +821,42 @@ tegra_car_wdt_enable(u_int timer, bool e | |||
821 | 821 | |||
822 | tegra_car_get_bs(&bst, &bsh); | 822 | tegra_car_get_bs(&bst, &bsh); | |
823 | 823 | |||
824 | enable_bits = enable ? | 824 | enable_bits = enable ? | |
825 | (CAR_RST_SOURCE_WDT_EN|CAR_RST_SOURCE_WDT_SYS_RST_EN) : 0; | 825 | (CAR_RST_SOURCE_WDT_EN|CAR_RST_SOURCE_WDT_SYS_RST_EN) : 0; | |
826 | 826 | |||
827 | tegra_reg_set_clear(bst, bsh, CAR_RST_SOURCE_REG, | 827 | tegra_reg_set_clear(bst, bsh, CAR_RST_SOURCE_REG, | |
828 | __SHIFTIN(timer - 1, CAR_RST_SOURCE_WDT_SEL) | | 828 | __SHIFTIN(timer - 1, CAR_RST_SOURCE_WDT_SEL) | | |
829 | enable_bits, | 829 | enable_bits, | |
830 | CAR_RST_SOURCE_WDT_SYS_RST_EN | | 830 | CAR_RST_SOURCE_WDT_SYS_RST_EN | | |
831 | CAR_RST_SOURCE_WDT_SEL | | 831 | CAR_RST_SOURCE_WDT_SEL | | |
832 | CAR_RST_SOURCE_WDT_EN); | 832 | CAR_RST_SOURCE_WDT_EN); | |
833 | } | 833 | } | |
834 | ||||
835 | void | |||
836 | tegra_car_gpu_enable(void) | |||
837 | { | |||
838 | bus_space_tag_t bst; | |||
839 | bus_space_handle_t bsh; | |||
840 | ||||
841 | tegra_car_get_bs(&bst, &bsh); | |||
842 | ||||
843 | /* Enter reset, enable clock */ | |||
844 | bus_space_write_4(bst, bsh, CAR_RST_DEV_X_SET_REG, CAR_DEV_X_GPU); | |||
845 | bus_space_write_4(bst, bsh, CAR_CLK_ENB_X_SET_REG, CAR_DEV_X_GPU); | |||
846 | ||||
847 | /* Set PLLP_OUT5 to 204MHz */ | |||
848 | const u_int rate = 204000000; | |||
849 | const u_int div = howmany(tegra_car_pllp0_rate() * 2, rate) - 2; | |||
850 | tegra_reg_set_clear(bst, bsh, CAR_PLLP_OUTC_REG, | |||
851 | __SHIFTIN(div, CAR_PLLP_OUTC_OUT5_RATIO) | | |||
852 | CAR_PLLP_OUTC_OUT5_CLKEN, | |||
853 | CAR_PLLP_OUTC_OUT5_RATIO); | |||
854 | delay(20); | |||
855 | ||||
856 | /* Remove clamping from 3D partition in the PMC */ | |||
857 | tegra_pmc_remove_clamping(PMC_PARTID_TD); | |||
858 | delay(20); | |||
859 | ||||
860 | /* Leave reset */ | |||
861 | bus_space_write_4(bst, bsh, CAR_RST_DEV_X_CLR_REG, CAR_DEV_X_GPU); | |||
862 | } |
--- src/sys/arch/arm/nvidia/Attic/tegra_carreg.h 2015/07/25 15:50:42 1.20
+++ src/sys/arch/arm/nvidia/Attic/tegra_carreg.h 2015/10/17 21:16:09 1.21
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: tegra_carreg.h,v 1.20 2015/07/25 15:50:42 jmcneill Exp $ */ | 1 | /* $NetBSD: tegra_carreg.h,v 1.21 2015/10/17 21:16:09 jmcneill Exp $ */ | |
2 | 2 | |||
3 | /*- | 3 | /*- | |
4 | * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> | 4 | * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> | |
5 | * All rights reserved. | 5 | * All rights reserved. | |
6 | * | 6 | * | |
7 | * Redistribution and use in source and binary forms, with or without | 7 | * Redistribution and use in source and binary forms, with or without | |
8 | * modification, are permitted provided that the following conditions | 8 | * modification, are permitted provided that the following conditions | |
9 | * are met: | 9 | * are met: | |
10 | * 1. Redistributions of source code must retain the above copyright | 10 | * 1. Redistributions of source code must retain the above copyright | |
11 | * notice, this list of conditions and the following disclaimer. | 11 | * notice, this list of conditions and the following disclaimer. | |
12 | * 2. Redistributions in binary form must reproduce the above copyright | 12 | * 2. Redistributions in binary form must reproduce the above copyright | |
13 | * notice, this list of conditions and the following disclaimer in the | 13 | * notice, this list of conditions and the following disclaimer in the | |
14 | * documentation and/or other materials provided with the distribution. | 14 | * documentation and/or other materials provided with the distribution. | |
@@ -53,26 +53,31 @@ | @@ -53,26 +53,31 @@ | |||
53 | #define CAR_PLLP_BASE_DIVN __BITS(17,8) | 53 | #define CAR_PLLP_BASE_DIVN __BITS(17,8) | |
54 | #define CAR_PLLP_BASE_DIVM __BITS(4,0) | 54 | #define CAR_PLLP_BASE_DIVM __BITS(4,0) | |
55 | 55 | |||
56 | #define CAR_PLLP_OUTA_REG 0xa4 | 56 | #define CAR_PLLP_OUTA_REG 0xa4 | |
57 | #define CAR_PLLP_OUTB_REG 0xa8 | 57 | #define CAR_PLLP_OUTB_REG 0xa8 | |
58 | #define CAR_PLLP_OUTB_OUT4_RATIO __BITS(31,24) | 58 | #define CAR_PLLP_OUTB_OUT4_RATIO __BITS(31,24) | |
59 | #define CAR_PLLP_OUTB_OUT4_OVRRIDE __BIT(18) | 59 | #define CAR_PLLP_OUTB_OUT4_OVRRIDE __BIT(18) | |
60 | #define CAR_PLLP_OUTB_OUT4_CLKEN __BIT(17) | 60 | #define CAR_PLLP_OUTB_OUT4_CLKEN __BIT(17) | |
61 | #define CAR_PLLP_OUTB_OUT4_RSTN __BIT(16) | 61 | #define CAR_PLLP_OUTB_OUT4_RSTN __BIT(16) | |
62 | #define CAR_PLLP_OUTB_OUT3_RATIO __BITS(15,8) | 62 | #define CAR_PLLP_OUTB_OUT3_RATIO __BITS(15,8) | |
63 | #define CAR_PLLP_OUTB_OUT3_OVRRIDE __BIT(2) | 63 | #define CAR_PLLP_OUTB_OUT3_OVRRIDE __BIT(2) | |
64 | #define CAR_PLLP_OUTB_OUT3_CLKEN __BIT(1) | 64 | #define CAR_PLLP_OUTB_OUT3_CLKEN __BIT(1) | |
65 | #define CAR_PLLP_OUTB_OUT3_RSTN __BIT(0) | 65 | #define CAR_PLLP_OUTB_OUT3_RSTN __BIT(0) | |
66 | #define CAR_PLLP_OUTC_REG 0x67c | |||
67 | #define CAR_PLLP_OUTC_OUT5_RATIO __BITS(31,24) | |||
68 | #define CAR_PLLP_OUTC_OUT5_OVERRIDE __BIT(18) | |||
69 | #define CAR_PLLP_OUTC_OUT5_CLKEN __BIT(17) | |||
70 | #define CAR_PLLP_OUTC_OUT5_RSTN __BIT(16) | |||
66 | #define CAR_PLLP_MISC_REG 0xac | 71 | #define CAR_PLLP_MISC_REG 0xac | |
67 | 72 | |||
68 | #define CAR_PLLC_BASE_REG 0x80 | 73 | #define CAR_PLLC_BASE_REG 0x80 | |
69 | #define CAR_PLLC_BASE_ENABLE __BIT(30) | 74 | #define CAR_PLLC_BASE_ENABLE __BIT(30) | |
70 | #define CAR_PLLC_BASE_REF_DIS __BIT(29) | 75 | #define CAR_PLLC_BASE_REF_DIS __BIT(29) | |
71 | #define CAR_PLLC_BASE_LOCK_OVERRIDE __BIT(28) | 76 | #define CAR_PLLC_BASE_LOCK_OVERRIDE __BIT(28) | |
72 | #define CAR_PLLC_BASE_LOCK __BIT(27) | 77 | #define CAR_PLLC_BASE_LOCK __BIT(27) | |
73 | #define CAR_PLLC_BASE_DIVP __BITS(23,20) | 78 | #define CAR_PLLC_BASE_DIVP __BITS(23,20) | |
74 | #define CAR_PLLC_BASE_DIVN __BITS(15,8) | 79 | #define CAR_PLLC_BASE_DIVN __BITS(15,8) | |
75 | #define CAR_PLLC_BASE_DIVM __BITS(7,0) | 80 | #define CAR_PLLC_BASE_DIVM __BITS(7,0) | |
76 | 81 | |||
77 | #define CAR_PLLU_BASE_REG 0xc0 | 82 | #define CAR_PLLU_BASE_REG 0xc0 | |
78 | #define CAR_PLLU_BASE_BYPASS __BIT(31) | 83 | #define CAR_PLLU_BASE_BYPASS __BIT(31) |
--- src/sys/arch/arm/nvidia/tegra_var.h 2015/08/01 21:20:11 1.24
+++ src/sys/arch/arm/nvidia/tegra_var.h 2015/10/17 21:16:09 1.25
@@ -1,14 +1,14 @@ | @@ -1,14 +1,14 @@ | |||
1 | /* $NetBSD: tegra_var.h,v 1.24 2015/08/01 21:20:11 jmcneill Exp $ */ | 1 | /* $NetBSD: tegra_var.h,v 1.25 2015/10/17 21:16:09 jmcneill Exp $ */ | |
2 | 2 | |||
3 | /*- | 3 | /*- | |
4 | * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> | 4 | * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca> | |
5 | * All rights reserved. | 5 | * All rights reserved. | |
6 | * | 6 | * | |
7 | * Redistribution and use in source and binary forms, with or without | 7 | * Redistribution and use in source and binary forms, with or without | |
8 | * modification, are permitted provided that the following conditions | 8 | * modification, are permitted provided that the following conditions | |
9 | * are met: | 9 | * are met: | |
10 | * 1. Redistributions of source code must retain the above copyright | 10 | * 1. Redistributions of source code must retain the above copyright | |
11 | * notice, this list of conditions and the following disclaimer. | 11 | * notice, this list of conditions and the following disclaimer. | |
12 | * 2. Redistributions in binary form must reproduce the above copyright | 12 | * 2. Redistributions in binary form must reproduce the above copyright | |
13 | * notice, this list of conditions and the following disclaimer in the | 13 | * notice, this list of conditions and the following disclaimer in the | |
14 | * documentation and/or other materials provided with the distribution. | 14 | * documentation and/or other materials provided with the distribution. | |
@@ -98,26 +98,27 @@ u_int tegra_car_uart_rate(u_int); | @@ -98,26 +98,27 @@ u_int tegra_car_uart_rate(u_int); | |||
98 | u_int tegra_car_periph_sdmmc_rate(u_int); | 98 | u_int tegra_car_periph_sdmmc_rate(u_int); | |
99 | int tegra_car_periph_sdmmc_set_rate(u_int, u_int); | 99 | int tegra_car_periph_sdmmc_set_rate(u_int, u_int); | |
100 | int tegra_car_periph_usb_enable(u_int); | 100 | int tegra_car_periph_usb_enable(u_int); | |
101 | void tegra_car_periph_hda_enable(void); | 101 | void tegra_car_periph_hda_enable(void); | |
102 | void tegra_car_periph_sata_enable(void); | 102 | void tegra_car_periph_sata_enable(void); | |
103 | int tegra_car_periph_i2c_enable(u_int, u_int); | 103 | int tegra_car_periph_i2c_enable(u_int, u_int); | |
104 | void tegra_car_periph_cec_enable(void); | 104 | void tegra_car_periph_cec_enable(void); | |
105 | void tegra_car_utmip_init(void); | 105 | void tegra_car_utmip_init(void); | |
106 | void tegra_car_utmip_enable(u_int); | 106 | void tegra_car_utmip_enable(u_int); | |
107 | void tegra_car_hdmi_enable(u_int); | 107 | void tegra_car_hdmi_enable(u_int); | |
108 | int tegra_car_dc_enable(u_int); | 108 | int tegra_car_dc_enable(u_int); | |
109 | void tegra_car_host1x_enable(void); | 109 | void tegra_car_host1x_enable(void); | |
110 | void tegra_car_wdt_enable(u_int, bool); | 110 | void tegra_car_wdt_enable(u_int, bool); | |
111 | void tegra_car_gpu_enable(void); | |||
111 | 112 | |||
112 | struct tegra_gpio_pin; | 113 | struct tegra_gpio_pin; | |
113 | struct tegra_gpio_pin *tegra_gpio_acquire(const char *, u_int); | 114 | struct tegra_gpio_pin *tegra_gpio_acquire(const char *, u_int); | |
114 | void tegra_gpio_release(struct tegra_gpio_pin *); | 115 | void tegra_gpio_release(struct tegra_gpio_pin *); | |
115 | int tegra_gpio_read(struct tegra_gpio_pin *); | 116 | int tegra_gpio_read(struct tegra_gpio_pin *); | |
116 | void tegra_gpio_write(struct tegra_gpio_pin *, int); | 117 | void tegra_gpio_write(struct tegra_gpio_pin *, int); | |
117 | 118 | |||
118 | struct tegra_mpio_padctlgrp { | 119 | struct tegra_mpio_padctlgrp { | |
119 | int preemp; | 120 | int preemp; | |
120 | int hsm; | 121 | int hsm; | |
121 | int schmt; | 122 | int schmt; | |
122 | int drv_type; | 123 | int drv_type; | |
123 | int drvdn; | 124 | int drvdn; |