 @@ -1,14 +1,14 @@
-/* $NetBSD: tegra_reg.h,v 1.20 2015/11/21 22:55:32 jmcneill Exp $ */
+/* $NetBSD: tegra_reg.h,v 1.21 2016/03/26 09:07:31 skrll Exp $ */
 /*-
  * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -62,28 +62,30 @@
 #define TEGRA_HOST1X_BASE	0x50000000
 #define TEGRA_HOST1X_SIZE	0x00034000
 #define TEGRA_GHOST_BASE	0x54000000
 #define TEGRA_GHOST_SIZE	0x01000000
 #define TEGRA_GPU_BASE		0x57000000
 #define TEGRA_GPU_SIZE		0x02000000
 #define TEGRA_PPSB_BASE		0x60000000
 #define TEGRA_PPSB_SIZE		0x01000000
 #define TEGRA_APB_BASE		0x70000000
 #define TEGRA_APB_SIZE		0x01000000
 #define TEGRA_AHB_A2_BASE	0x7c000000
 #define TEGRA_AHB_A2_SIZE	0x02000000
-#define TEGRA_PPSB_VBASE	0xfd000000
+#define TEGRA_HOST1X_VBASE	0xfaf00000
-#define TEGRA_APB_VBASE		0xfe000000
+#define TEGRA_PPSB_VBASE	0xfb000000
 #define TEGRA_APB_VBASE		0xfc000000
 #define TEGRA_AHB_A2_VBASE	0xfd000000
 #define TEGRA_REF_FREQ		12000000
 /* APB */
 #define TEGRA_MPIO_OFFSET	0x00000000
 #define TEGRA_MPIO_SIZE		0x4000
 #define TEGRA_UARTA_OFFSET	0x00006000
 #define TEGRA_UARTA_SIZE	0x40
 #define TEGRA_UARTB_OFFSET	0x00006040
 #define TEGRA_UARTB_SIZE	0x40
 #define TEGRA_UARTC_OFFSET	0x00006200
 #define TEGRA_UARTC_SIZE	0x100
 #define TEGRA_UARTD_OFFSET	0x00006300

 @@ -1,14 +1,14 @@
-/* $NetBSD: tegra_soc.c,v 1.8 2015/12/22 22:10:36 jmcneill Exp $ */
+/* $NetBSD: tegra_soc.c,v 1.9 2016/03/26 09:07:31 skrll Exp $ */
 /*-
  * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -20,66 +20,76 @@
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  */
 #include "opt_tegra.h"
 #include "opt_multiprocessor.h"
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_soc.c,v 1.8 2015/12/22 22:10:36 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_soc.c,v 1.9 2016/03/26 09:07:31 skrll Exp $");
 #define	_ARM32_BUS_DMA_PRIVATE
 #include <sys/param.h>
 #include <sys/bus.h>
 #include <sys/cpu.h>
 #include <sys/device.h>
 #include <uvm/uvm_extern.h>
 #include <arm/bootconfig.h>
 #include <arm/cpufunc.h>
 #include <arm/nvidia/tegra_reg.h>
 #include <arm/nvidia/tegra_apbreg.h>
 #include <arm/nvidia/tegra_mcreg.h>
 #include <arm/nvidia/tegra_var.h>
 bus_space_handle_t tegra_host1x_bsh;
 bus_space_handle_t tegra_ppsb_bsh;
 bus_space_handle_t tegra_apb_bsh;
 bus_space_handle_t tegra_ahb_a2_bsh;
 struct arm32_bus_dma_tag tegra_dma_tag = {
 	_BUS_DMAMAP_FUNCS,
 	_BUS_DMAMEM_FUNCS,
 	_BUS_DMATAG_FUNCS,
 };
 static void	tegra_mpinit(void);
 void
 tegra_bootstrap(void)
+{
 	if (bus_space_map(&armv7_generic_bs_tag,
 	    TEGRA_HOST1X_BASE, TEGRA_HOST1X_SIZE, 0,
 	    &tegra_host1x_bsh) != 0)
 		panic("couldn't map HOST1X");
 	if (bus_space_map(&armv7_generic_bs_tag,
 	    TEGRA_PPSB_BASE, TEGRA_PPSB_SIZE, 0,
 	    &tegra_ppsb_bsh) != 0)
 		panic("couldn't map PPSB");
 	if (bus_space_map(&armv7_generic_bs_tag,
 	    TEGRA_APB_BASE, TEGRA_APB_SIZE, 0,
 	    &tegra_apb_bsh) != 0)
 		panic("couldn't map APB");
 	if (bus_space_map(&armv7_generic_bs_tag,
 	    TEGRA_AHB_A2_BASE, TEGRA_AHB_A2_SIZE, 0,
 	    &tegra_ahb_a2_bsh) != 0)
 		panic("couldn't map AHB A2");
 	tegra_mpinit();
+}
 void
 tegra_dma_bootstrap(psize_t psize)
+{
+}
 void
 tegra_cpuinit(void)
+{
 	switch (tegra_chip_id()) {

 @@ -1,14 +1,14 @@
-/* $NetBSD: tegra_machdep.c,v 1.37 2015/12/22 22:10:36 jmcneill Exp $ */
+/* $NetBSD: tegra_machdep.c,v 1.38 2016/03/26 09:07:31 skrll Exp $ */
 /*-
  * Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -17,27 +17,27 @@
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_machdep.c,v 1.37 2015/12/22 22:10:36 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_machdep.c,v 1.38 2016/03/26 09:07:31 skrll Exp $");
 #include "opt_tegra.h"
 #include "opt_machdep.h"
 #include "opt_ddb.h"
 #include "opt_md.h"
 #include "opt_arm_debug.h"
 #include "opt_multiprocessor.h"
 #include "com.h"
 #include "ukbd.h"
 #include "genfb.h"
 #include "ether.h"
 #include "as3722pmic.h"
 @@ -112,39 +112,53 @@ extern char KERNEL_BASE_phys[];
 #define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys)
 static void tegra_device_register(device_t, void *);
 static void tegra_reset(void);
 static void tegra_powerdown(void);
 bs_protos(bs_notimpl);
 #define	_A(a)	((a) & ~L1_S_OFFSET)
 #define	_S(s)	(((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
 static const struct pmap_devmap devmap[] = {
+	{
 		.pd_va = _A(TEGRA_HOST1X_VBASE),
 		.pd_pa = _A(TEGRA_HOST1X_BASE),
 		.pd_size = _S(TEGRA_HOST1X_SIZE),
 		.pd_prot = VM_PROT_READ|VM_PROT_WRITE,
 		.pd_cache = PTE_NOCACHE
 	},
+	{
 		.pd_va = _A(TEGRA_PPSB_VBASE),
 		.pd_pa = _A(TEGRA_PPSB_BASE),
 		.pd_size = _S(TEGRA_PPSB_SIZE),
 		.pd_prot = VM_PROT_READ|VM_PROT_WRITE,
 		.pd_cache = PTE_NOCACHE
 	},
+	{
 		.pd_va = _A(TEGRA_APB_VBASE),
 		.pd_pa = _A(TEGRA_APB_BASE),
 		.pd_size = _S(TEGRA_APB_SIZE),
 		.pd_prot = VM_PROT_READ|VM_PROT_WRITE,
 		.pd_cache = PTE_NOCACHE
 	},
+	{
 		.pd_va = _A(TEGRA_AHB_A2_VBASE),
 		.pd_pa = _A(TEGRA_AHB_A2_BASE),
 		.pd_size = _S(TEGRA_AHB_A2_SIZE),
 		.pd_prot = VM_PROT_READ|VM_PROT_WRITE,
 		.pd_cache = PTE_NOCACHE
 	},
 	{0}
 };
 #undef	_A
 #undef	_S
 #ifdef PMAP_NEED_ALLOC_POOLPAGE
 static struct boot_physmem bp_lowgig = {
 	.bp_start = TEGRA_EXTMEM_BASE / NBPG,
 	.bp_pages = (KERNEL_VM_BASE - KERNEL_BASE) / NBPG,
 	.bp_freelist = VM_FREELIST_ISADMA,
 	.bp_flags = 0
 };