Tue Aug 15 09:08:39 2017 UTC ()
Rename intrddb -> intrddbipi, like i386.


(maxv)
diff -r1.26 -r1.27 src/sys/arch/amd64/amd64/db_interface.c
diff -r1.50 -r1.51 src/sys/arch/amd64/amd64/vector.S
diff -r1.61 -r1.62 src/sys/arch/x86/x86/lapic.c

cvs diff -r1.26 -r1.27 src/sys/arch/amd64/amd64/db_interface.c (expand / switch to unified diff)

--- src/sys/arch/amd64/amd64/db_interface.c 2017/08/15 06:57:53 1.26
+++ src/sys/arch/amd64/amd64/db_interface.c 2017/08/15 09:08:39 1.27
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: db_interface.c,v 1.26 2017/08/15 06:57:53 maxv Exp $ */ 1/* $NetBSD: db_interface.c,v 1.27 2017/08/15 09:08:39 maxv Exp $ */
2 2
3/* 3/*
4 * Mach Operating System 4 * Mach Operating System
5 * Copyright (c) 1991,1990 Carnegie Mellon University 5 * Copyright (c) 1991,1990 Carnegie Mellon University
6 * All Rights Reserved. 6 * All Rights Reserved.
7 * 7 *
8 * Permission to use, copy, modify and distribute this software and its 8 * Permission to use, copy, modify and distribute this software and its
9 * documentation is hereby granted, provided that both the copyright 9 * documentation is hereby granted, provided that both the copyright
10 * notice and this permission notice appear in all copies of the 10 * notice and this permission notice appear in all copies of the
11 * software, derivative works or modified versions, and any portions 11 * software, derivative works or modified versions, and any portions
12 * thereof, and that both notices appear in supporting documentation. 12 * thereof, and that both notices appear in supporting documentation.
13 * 13 *
14 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 14 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
@@ -23,27 +23,27 @@ @@ -23,27 +23,27 @@
23 * Pittsburgh PA 15213-3890 23 * Pittsburgh PA 15213-3890
24 * 24 *
25 * any improvements or extensions that they make and grant Carnegie the 25 * any improvements or extensions that they make and grant Carnegie the
26 * rights to redistribute these changes. 26 * rights to redistribute these changes.
27 * 27 *
28 * db_interface.c,v 2.4 1991/02/05 17:11:13 mrt (CMU) 28 * db_interface.c,v 2.4 1991/02/05 17:11:13 mrt (CMU)
29 */ 29 */
30 30
31/* 31/*
32 * Interface to new debugger. 32 * Interface to new debugger.
33 */ 33 */
34 34
35#include <sys/cdefs.h> 35#include <sys/cdefs.h>
36__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.26 2017/08/15 06:57:53 maxv Exp $"); 36__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.27 2017/08/15 09:08:39 maxv Exp $");
37 37
38#include "opt_ddb.h" 38#include "opt_ddb.h"
39#include "opt_multiprocessor.h" 39#include "opt_multiprocessor.h"
40 40
41#include "lapic.h" 41#include "lapic.h"
42 42
43#include <sys/param.h> 43#include <sys/param.h>
44#include <sys/proc.h> 44#include <sys/proc.h>
45#include <sys/reboot.h> 45#include <sys/reboot.h>
46#include <sys/systm.h> 46#include <sys/systm.h>
47#include <sys/atomic.h> 47#include <sys/atomic.h>
48#include <sys/cpu.h> 48#include <sys/cpu.h>
49 49
@@ -85,38 +85,38 @@ void kdbprinttrap(int, int); @@ -85,38 +85,38 @@ void kdbprinttrap(int, int);
85extern void ddb_ipi(struct trapframe); 85extern void ddb_ipi(struct trapframe);
86static void ddb_suspend(struct trapframe *); 86static void ddb_suspend(struct trapframe *);
87#ifndef XEN 87#ifndef XEN
88int ddb_vec; 88int ddb_vec;
89#endif /* XEN */ 89#endif /* XEN */
90static bool ddb_mp_online; 90static bool ddb_mp_online;
91#endif 91#endif
92 92
93#define NOCPU -1 93#define NOCPU -1
94 94
95int ddb_cpu = NOCPU; 95int ddb_cpu = NOCPU;
96 96
97typedef void (vector)(void); 97typedef void (vector)(void);
98extern vector Xintrddb, Xx2apic_intrddb; 98extern vector Xintrddbipi, Xx2apic_intrddbipi;
99 99
100void 100void
101db_machine_init(void) 101db_machine_init(void)
102{ 102{
103 103
104#ifdef MULTIPROCESSOR 104#ifdef MULTIPROCESSOR
105#ifndef XEN 105#ifndef XEN
106 vector *handler = &Xintrddb; 106 vector *handler = &Xintrddbipi;
107#if NLAPIC > 0 107#if NLAPIC > 0
108 if (lapic_is_x2apic()) 108 if (lapic_is_x2apic())
109 handler = &Xx2apic_intrddb; 109 handler = &Xx2apic_intrddbipi;
110#endif 110#endif
111 ddb_vec = idt_vec_alloc(0xf0, 0xff); 111 ddb_vec = idt_vec_alloc(0xf0, 0xff);
112 setgate(&idt[ddb_vec], handler, 1, SDT_SYS386IGT, SEL_KPL, 112 setgate(&idt[ddb_vec], handler, 1, SDT_SYS386IGT, SEL_KPL,
113 GSEL(GCODE_SEL, SEL_KPL)); 113 GSEL(GCODE_SEL, SEL_KPL));
114#else 114#else
115 /* Initialised as part of xen_ipi_init() */ 115 /* Initialised as part of xen_ipi_init() */
116#endif /* XEN */ 116#endif /* XEN */
117#endif 117#endif
118} 118}
119 119
120#ifdef MULTIPROCESSOR 120#ifdef MULTIPROCESSOR
121 121
122__cpu_simple_lock_t db_lock; 122__cpu_simple_lock_t db_lock;

cvs diff -r1.50 -r1.51 src/sys/arch/amd64/amd64/vector.S (expand / switch to unified diff)

--- src/sys/arch/amd64/amd64/vector.S 2017/07/16 14:02:48 1.50
+++ src/sys/arch/amd64/amd64/vector.S 2017/08/15 09:08:39 1.51
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: vector.S,v 1.50 2017/07/16 14:02:48 cherry Exp $ */ 1/* $NetBSD: vector.S,v 1.51 2017/08/15 09:08:39 maxv Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc. 4 * Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum and by Andrew Doran. 8 * by Charles M. Hannum and by Andrew Doran.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -145,59 +145,59 @@ IDTVEC(resume_lapic_ipi) @@ -145,59 +145,59 @@ IDTVEC(resume_lapic_ipi)
1451: 1451:
146 incl CPUVAR(IDEPTH) 146 incl CPUVAR(IDEPTH)
147 movl $IPL_HIGH,CPUVAR(ILEVEL) 147 movl $IPL_HIGH,CPUVAR(ILEVEL)
148 sti 148 sti
149 pushq %rbx 149 pushq %rbx
150 call _C_LABEL(x86_ipi_handler) 150 call _C_LABEL(x86_ipi_handler)
151 jmp _C_LABEL(Xdoreti) 151 jmp _C_LABEL(Xdoreti)
1522: 1522:
153 orl $(1 << LIR_IPI),CPUVAR(IPENDING) 153 orl $(1 << LIR_IPI),CPUVAR(IPENDING)
154 INTRFASTEXIT 154 INTRFASTEXIT
155IDTVEC_END(resume_lapic_ipi) 155IDTVEC_END(resume_lapic_ipi)
156 156
157#if defined(DDB) 157#if defined(DDB)
158IDTVEC(intrddb) 158IDTVEC(intrddbipi)
1591: 1591:
160 pushq $0 160 pushq $0
161 pushq $T_BPTFLT 161 pushq $T_BPTFLT
162 INTRENTRY 162 INTRENTRY
163 movl $0xf,%eax 163 movl $0xf,%eax
164 movq %rax,%cr8 164 movq %rax,%cr8
165 movq _C_LABEL(local_apic_va),%rbx 165 movq _C_LABEL(local_apic_va),%rbx
166 movl $0,LAPIC_EOI(%rbx) 166 movl $0,LAPIC_EOI(%rbx)
167 sti 167 sti
168 call _C_LABEL(ddb_ipi) 168 call _C_LABEL(ddb_ipi)
169 xorl %eax,%eax 169 xorl %eax,%eax
170 movq %rax,%cr8 170 movq %rax,%cr8
171 INTRFASTEXIT 171 INTRFASTEXIT
172IDTVEC_END(intrddb) 172IDTVEC_END(intrddbipi)
173 173
174IDTVEC(x2apic_intrddb) 174IDTVEC(x2apic_intrddbipi)
1751: 1751:
176 pushq $0 176 pushq $0
177 pushq $T_BPTFLT 177 pushq $T_BPTFLT
178 INTRENTRY 178 INTRENTRY
179 movl $0xf,%eax 179 movl $0xf,%eax
180 movq %rax,%cr8 180 movq %rax,%cr8
181 movl $(MSR_X2APIC_BASE + MSR_X2APIC_EOI),%ecx 181 movl $(MSR_X2APIC_BASE + MSR_X2APIC_EOI),%ecx
182 xorl %eax,%eax 182 xorl %eax,%eax
183 xorl %edx,%edx 183 xorl %edx,%edx
184 wrmsr 184 wrmsr
185 sti 185 sti
186 call _C_LABEL(ddb_ipi) 186 call _C_LABEL(ddb_ipi)
187 xorl %eax,%eax 187 xorl %eax,%eax
188 movq %rax,%cr8 188 movq %rax,%cr8
189 INTRFASTEXIT 189 INTRFASTEXIT
190IDTVEC_END(x2apic_intrddb) 190IDTVEC_END(x2apic_intrddbipi)
191#endif /* DDB */ 191#endif /* DDB */
192#endif /* MULTIPROCESSOR */ 192#endif /* MULTIPROCESSOR */
193 193
194 /* 194 /*
195 * Interrupt from the local APIC timer. 195 * Interrupt from the local APIC timer.
196 */ 196 */
197IDTVEC(recurse_lapic_ltimer) 197IDTVEC(recurse_lapic_ltimer)
198 INTR_RECURSE_HWFRAME 198 INTR_RECURSE_HWFRAME
199 pushq $0 199 pushq $0
200 pushq $T_ASTFLT 200 pushq $T_ASTFLT
201 INTRENTRY 201 INTRENTRY
202 jmp 1f 202 jmp 1f
203IDTVEC_END(recurse_lapic_ltimer) 203IDTVEC_END(recurse_lapic_ltimer)

cvs diff -r1.61 -r1.62 src/sys/arch/x86/x86/lapic.c (expand / switch to unified diff)

--- src/sys/arch/x86/x86/lapic.c 2017/08/11 06:18:29 1.61
+++ src/sys/arch/x86/x86/lapic.c 2017/08/15 09:08:39 1.62
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: lapic.c,v 1.61 2017/08/11 06:18:29 maxv Exp $ */ 1/* $NetBSD: lapic.c,v 1.62 2017/08/15 09:08:39 maxv Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2000, 2008 The NetBSD Foundation, Inc. 4 * Copyright (c) 2000, 2008 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by RedBack Networks Inc. 8 * by RedBack Networks Inc.
9 * 9 *
10 * Author: Bill Sommerfeld 10 * Author: Bill Sommerfeld
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions 13 * modification, are permitted provided that the following conditions
14 * are met: 14 * are met:
@@ -22,27 +22,27 @@ @@ -22,27 +22,27 @@
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE. 31 * POSSIBILITY OF SUCH DAMAGE.
32 */ 32 */
33 33
34#include <sys/cdefs.h> 34#include <sys/cdefs.h>
35__KERNEL_RCSID(0, "$NetBSD: lapic.c,v 1.61 2017/08/11 06:18:29 maxv Exp $"); 35__KERNEL_RCSID(0, "$NetBSD: lapic.c,v 1.62 2017/08/15 09:08:39 maxv Exp $");
36 36
37#include "acpica.h" 37#include "acpica.h"
38#include "ioapic.h" 38#include "ioapic.h"
39#include "opt_acpi.h" 39#include "opt_acpi.h"
40#include "opt_ddb.h" 40#include "opt_ddb.h"
41#include "opt_mpbios.h" /* for MPDEBUG */ 41#include "opt_mpbios.h" /* for MPDEBUG */
42#include "opt_multiprocessor.h" 42#include "opt_multiprocessor.h"
43#include "opt_ntp.h" 43#include "opt_ntp.h"
44 44
45#include <sys/param.h> 45#include <sys/param.h>
46#include <sys/proc.h> 46#include <sys/proc.h>
47#include <sys/systm.h> 47#include <sys/systm.h>
48#include <sys/device.h> 48#include <sys/device.h>
@@ -70,27 +70,27 @@ __KERNEL_RCSID(0, "$NetBSD: lapic.c,v 1. @@ -70,27 +70,27 @@ __KERNEL_RCSID(0, "$NetBSD: lapic.c,v 1.
70#include <machine/i82489reg.h> 70#include <machine/i82489reg.h>
71#include <machine/i82489var.h> 71#include <machine/i82489var.h>
72 72
73#if NACPICA > 0 73#if NACPICA > 0
74#include <dev/acpi/acpica.h> 74#include <dev/acpi/acpica.h>
75#include <dev/acpi/acpivar.h> 75#include <dev/acpi/acpivar.h>
76#endif 76#endif
77 77
78#ifdef DDB 78#ifdef DDB
79#include <machine/db_machdep.h> 79#include <machine/db_machdep.h>
80#ifdef MULTIPROCESSOR 80#ifdef MULTIPROCESSOR
81#ifdef __x86_64__ 81#ifdef __x86_64__
82typedef void (vector)(void); 82typedef void (vector)(void);
83extern vector Xx2apic_intrddb; 83extern vector Xx2apic_intrddbipi;
84extern int ddb_vec; 84extern int ddb_vec;
85#endif 85#endif
86#endif 86#endif
87#endif 87#endif
88 88
89#include <x86/x86/vmtreg.h> /* for vmt_hvcall() */ 89#include <x86/x86/vmtreg.h> /* for vmt_hvcall() */
90#include <x86/x86/vmtvar.h> /* for vmt_hvcall() */ 90#include <x86/x86/vmtvar.h> /* for vmt_hvcall() */
91 91
92/* Referenced from vector.S */ 92/* Referenced from vector.S */
93void lapic_clockintr(void *, struct intrframe *); 93void lapic_clockintr(void *, struct intrframe *);
94 94
95static void lapic_delay(unsigned int); 95static void lapic_delay(unsigned int);
96static uint32_t lapic_gettick(void); 96static uint32_t lapic_gettick(void);
@@ -323,28 +323,28 @@ lapic_setup_bsp(paddr_t lapic_base) @@ -323,28 +323,28 @@ lapic_setup_bsp(paddr_t lapic_base)
323 } 323 }
324 } 324 }
325 if (x2apic_mode) { 325 if (x2apic_mode) {
326 x86_ipi = x2apic_ipi; 326 x86_ipi = x2apic_ipi;
327#if NIOAPIC > 0 327#if NIOAPIC > 0
328 struct ioapic_softc *ioapic; 328 struct ioapic_softc *ioapic;
329 for (ioapic = ioapics; ioapic != NULL; ioapic = ioapic->sc_next) { 329 for (ioapic = ioapics; ioapic != NULL; ioapic = ioapic->sc_next) {
330 ioapic->sc_pic.pic_edge_stubs = x2apic_edge_stubs; 330 ioapic->sc_pic.pic_edge_stubs = x2apic_edge_stubs;
331 ioapic->sc_pic.pic_level_stubs = x2apic_level_stubs; 331 ioapic->sc_pic.pic_level_stubs = x2apic_level_stubs;
332 } 332 }
333#endif 333#endif
334#if defined(DDB) && defined(MULTIPROCESSOR) 334#if defined(DDB) && defined(MULTIPROCESSOR)
335#ifdef __x86_64__ 335#ifdef __x86_64__
336 setgate(&idt[ddb_vec], &Xx2apic_intrddb, 1, SDT_SYS386IGT, SEL_KPL, 336 setgate(&idt[ddb_vec], &Xx2apic_intrddbipi, 1, SDT_SYS386IGT,
337 GSEL(GCODE_SEL, SEL_KPL)); 337 SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
338#else 338#else
339 /* Set DDB IPI handler in cpu_set_tss_gates() when cpu0 is attached. */ 339 /* Set DDB IPI handler in cpu_set_tss_gates() when cpu0 is attached. */
340#endif 340#endif
341#endif 341#endif
342 342
343 x86_disable_intr(); 343 x86_disable_intr();
344 lapic_enable_x2apic(); 344 lapic_enable_x2apic();
345#ifdef MULTIPROCESSOR 345#ifdef MULTIPROCESSOR
346 cpu_init_first(); /* catch up to changed cpu_number() */ 346 cpu_init_first(); /* catch up to changed cpu_number() */
347#endif 347#endif
348 lapic_write_tpri(0); 348 lapic_write_tpri(0);
349 x86_enable_intr(); 349 x86_enable_intr();
350 } else 350 } else