Tue Mar 13 13:41:14 2018 UTC ()
Pull up following revision(s) (requested by tsutsui in ticket #624):
	sys/arch/atari/stand/xxboot/sdboot/milan/Makefile: revision 1.4
	sys/arch/atari/dev/nvram.c: revision 1.21
	sys/arch/atari/conf/MILAN.in: revision 1.28
	sys/arch/atari/atari/pmap_bootstrap.c: revision 1.9
	sys/dev/isa/fd.c: revision 1.111
	sys/arch/atari/atari/bus.c: revision 1.60
	sys/arch/atari/stand/xxboot/ahdi-xxboot/milan/Makefile: revision 1.4
	sys/arch/atari/atari/locore.s: revision 1.111
	sys/arch/atari/isa/isa_machdep.c: revision 1.41
	distrib/sets/lists/base/md.atari: revision 1.55
	sys/arch/atari/pci/pci_machdep.c: revision 1.55
	sys/arch/atari/pci/pci_machdep.c: revision 1.56
	sys/arch/atari/include/vmparam.h: revision 1.32
	sys/arch/atari/isa/isa_milan.c: revision 1.15
	sys/arch/atari/isa/isa_milan.c: revision 1.16
	sys/arch/atari/atari/bus.c: revision 1.59
	sys/arch/atari/atari/atari_init.c: revision 1.101
	sys/arch/atari/pci/pci_milan.c: revision 1.15
Fix I/O access failures for regions allocated by bus_space_map(9) on Milan.

Passing to PMAP_WIRED against I/O spaces seems problematic,
probably after yamt-km branch merge, which was committed
between NetBSD 3.0 and NetBSD 4.0.
(i.e. ISA and PCI devices on Milan didn't work after 4.0 release)

XXX:
According to pmap(9) man page, the "flags" arg for pmap_enter(9)
doesn't take VM_PROT_READ and VM_PROT_WRITE, but pmap_enter()
implementation in sys/arch/m68k/m68k/pmap_motolora.c historically
checks them.

Fix silent hang during config_console() (before consinit()) on Milan.
config_console() was a dirty hack used by ancient m68k ports
to probe and initialize console devices before "real" configure(9),
using subset of configure(9) functions.

In that case, most device specific data (except I/O access method)
are not initialized so we must not access device specific device_t and
softc structures in config_console() cases.

Fix silent hang after isa_intr_establish() on Milan.
The problems (wrong macro replacements) were slipped in rev 1.107:
http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/atari/atari/locore.s#rev1.107
Handle yet another atari specific quirk in the MI ISA fdc(4)/fd(4) driver.
This makes fd(4) drive(s) (which is necessary for installation)
properly attached on Milan.
atari uses "fdcisa" and "fdisa" for ISA fdc to co-exist other fd(4)
drivers, on-board (atari/dev/fd.c) one and Hades (atari/dev/hdfd.c) one.

Use a proper PSL value to be passed to splx(9) functions.
This should have been changed on yamt-splraiseipl branch merge
back in 2006, which made MI IPL_xxx values independent from
m68k MD PSL values for the %sr register.

Restore piixide(4) for Milan and disable other pciide devices.
piixide was removed in rev 1.18 and the log message said
"because Intel IDE disk controllers only exist as part of
 Intel chipsets for x86 systems" but the Milan actually has
the Intel 82371FB southbridge on its board.
Other pciide devices are unlikely necessary for the default
kernel for such a rare machine.
Also fix pasto in comment.

Skip NVRAM checksum check and re-initialization on Milan.
Milan's firmware seems to use different check method.

Ack EOI for IRQ_SLAVE of the master PIC after ack for IRQ of the slave PIC.
I'm not sure if there are possible races in the original code, but
this is what i8259_asm_ack2() in sys/arch/x86/include/i8259.h does
and it looks this change makes a Milan kernel a bit stable.
Replace CRTC register values with ones taken from sys/dev/ic/vga_subr.c.
This fixes noise around column 3 and 4 and makes screen output clearer
on Milan with S3 Trio64V.

Explicitly setup the secondary IDE interrupt of PIIX on Milan.
The secondary IDE interrupt is connected to MBIRQ0 on PIIX, but
the Milan's ROM bootloader (at least version 0.99.7) doesn't seem
to setup the MBIRQ0 register to route it to IRQ15.

On Milan, also explicitly disable MBIRQ1 on PIIX.
Milan's ROM bootloader v1.2 and v1.4 incorrectly set MBIRQ0 connected
to the secondary IDE to IRQ14 (not 15) and unused MBIRQ1 to IRQ15,
so both IDE channels don't work properly.

Add dumb memory probe routines for Milan to use all available memory.
Tested on Milan with 32Mx1, 32Mx4, 128MBx1, and 128MBx3.
(bootloader ROM fails to load TOS with 128MBx4)
No particular comment on port-atari@:
 http://mail-index.netbsd.org/port-atari/2018/02/09/msg000580.html

Provide wdboot as a copy of sdboot for Milan.
It looks Milan's bootloader ROM emulates IDE disks as SCSI disks
so sdboot works for them, but atari's installboot checks a specified
device name and requires wdboot for wd(4) devices.

Fix another possible out of bounds.

Replace bus_dmamap_sync(9) op with a newer one taken from m68k/bus_dma.c.
This could fix memory corruption issue caused by PREREAD ops with regions
whose boundaries are not aligned at cacheline size.


(martin)
diff -r1.54 -r1.54.16.1 src/distrib/sets/lists/base/md.atari
diff -r1.100 -r1.100.32.1 src/sys/arch/atari/atari/atari_init.c
diff -r1.58 -r1.58.12.1 src/sys/arch/atari/atari/bus.c
diff -r1.110 -r1.110.40.1 src/sys/arch/atari/atari/locore.s
diff -r1.8 -r1.8.8.1 src/sys/arch/atari/atari/pmap_bootstrap.c
diff -r1.27 -r1.27.20.1 src/sys/arch/atari/conf/MILAN.in
diff -r1.20 -r1.20.10.1 src/sys/arch/atari/dev/nvram.c
diff -r1.31 -r1.31.6.1 src/sys/arch/atari/include/vmparam.h
diff -r1.40 -r1.40.30.1 src/sys/arch/atari/isa/isa_machdep.c
diff -r1.14 -r1.14.56.1 src/sys/arch/atari/isa/isa_milan.c
diff -r1.54 -r1.54.22.1 src/sys/arch/atari/pci/pci_machdep.c
diff -r1.14 -r1.14.10.1 src/sys/arch/atari/pci/pci_milan.c
diff -r1.3 -r1.3.188.1 src/sys/arch/atari/stand/xxboot/ahdi-xxboot/milan/Makefile
diff -r1.3 -r1.3.188.1 src/sys/arch/atari/stand/xxboot/sdboot/milan/Makefile
diff -r1.110 -r1.110.10.1 src/sys/dev/isa/fd.c

cvs diff -r1.54 -r1.54.16.1 src/distrib/sets/lists/base/md.atari (expand / switch to unified diff)

--- src/distrib/sets/lists/base/md.atari 2014/08/06 12:15:01 1.54
+++ src/distrib/sets/lists/base/md.atari 2018/03/13 13:41:14 1.54.16.1
@@ -1,25 +1,27 @@ @@ -1,25 +1,27 @@
1# $NetBSD: md.atari,v 1.54 2014/08/06 12:15:01 martin Exp $ 1# $NetBSD: md.atari,v 1.54.16.1 2018/03/13 13:41:14 martin Exp $
2./sbin/ahdilabel base-sysutil-root 2./sbin/ahdilabel base-sysutil-root
3./sbin/binpatch base-sysutil-root 3./sbin/binpatch base-sysutil-root
4./sbin/edahdi base-sysutil-root 4./sbin/edahdi base-sysutil-root
5./usr/bin/msconfig base-util-bin 5./usr/bin/msconfig base-util-bin
6./usr/mdec/installboot base-sysutil-bin 6./usr/mdec/installboot base-sysutil-bin
7./usr/mdec/milan base-sysutil-bin 7./usr/mdec/milan base-sysutil-bin
8./usr/mdec/milan/boot.atari base-sysutil-bin 8./usr/mdec/milan/boot.atari base-sysutil-bin
9./usr/mdec/milan/bootxx base-sysutil-bin 9./usr/mdec/milan/bootxx base-sysutil-bin
10./usr/mdec/milan/fdboot base-sysutil-bin 10./usr/mdec/milan/fdboot base-sysutil-bin
11./usr/mdec/milan/sdb00t.ahdi base-sysutil-bin 11./usr/mdec/milan/sdb00t.ahdi base-sysutil-bin
12./usr/mdec/milan/sdboot base-sysutil-bin 12./usr/mdec/milan/sdboot base-sysutil-bin
 13./usr/mdec/milan/wdb00t.ahdi base-sysutil-bin
 14./usr/mdec/milan/wdboot base-sysutil-bin
13./usr/mdec/milan/xxboot.ahdi base-sysutil-bin 15./usr/mdec/milan/xxboot.ahdi base-sysutil-bin
14./usr/mdec/std base-sysutil-bin 16./usr/mdec/std base-sysutil-bin
15./usr/mdec/std/boot.atari base-sysutil-bin 17./usr/mdec/std/boot.atari base-sysutil-bin
16./usr/mdec/std/bootxx base-sysutil-bin 18./usr/mdec/std/bootxx base-sysutil-bin
17./usr/mdec/std/fdboot base-sysutil-bin 19./usr/mdec/std/fdboot base-sysutil-bin
18./usr/mdec/std/sdb00t.ahdi base-sysutil-bin 20./usr/mdec/std/sdb00t.ahdi base-sysutil-bin
19./usr/mdec/std/sdboot base-sysutil-bin 21./usr/mdec/std/sdboot base-sysutil-bin
20./usr/mdec/std/wdb00t.ahdi base-sysutil-bin 22./usr/mdec/std/wdb00t.ahdi base-sysutil-bin
21./usr/mdec/std/wdboot base-sysutil-bin 23./usr/mdec/std/wdboot base-sysutil-bin
22./usr/mdec/std/xxboot.ahdi base-sysutil-bin 24./usr/mdec/std/xxboot.ahdi base-sysutil-bin
23./usr/sbin/bootpref base-sysutil-bin 25./usr/sbin/bootpref base-sysutil-bin
24./usr/sbin/iteconfig base-sysutil-bin 26./usr/sbin/iteconfig base-sysutil-bin
25./usr/sbin/loadkmap base-sysutil-bin 27./usr/sbin/loadkmap base-sysutil-bin

cvs diff -r1.100 -r1.100.32.1 src/sys/arch/atari/atari/atari_init.c (expand / switch to unified diff)

--- src/sys/arch/atari/atari/atari_init.c 2012/08/10 17:43:32 1.100
+++ src/sys/arch/atari/atari/atari_init.c 2018/03/13 13:41:13 1.100.32.1
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: atari_init.c,v 1.100 2012/08/10 17:43:32 tsutsui Exp $ */ 1/* $NetBSD: atari_init.c,v 1.100.32.1 2018/03/13 13:41:13 martin Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 1995 Leo Weppelman 4 * Copyright (c) 1995 Leo Weppelman
5 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1994 Michael L. Hitch
6 * Copyright (c) 1993 Markus Wild 6 * Copyright (c) 1993 Markus Wild
7 * All rights reserved. 7 * All rights reserved.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -23,27 +23,27 @@ @@ -23,27 +23,27 @@
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35#include <sys/cdefs.h> 35#include <sys/cdefs.h>
36__KERNEL_RCSID(0, "$NetBSD: atari_init.c,v 1.100 2012/08/10 17:43:32 tsutsui Exp $"); 36__KERNEL_RCSID(0, "$NetBSD: atari_init.c,v 1.100.32.1 2018/03/13 13:41:13 martin Exp $");
37 37
38#include "opt_ddb.h" 38#include "opt_ddb.h"
39#include "opt_mbtype.h" 39#include "opt_mbtype.h"
40#include "opt_m060sp.h" 40#include "opt_m060sp.h"
41#include "opt_m68k_arch.h" 41#include "opt_m68k_arch.h"
42 42
43#include <sys/param.h> 43#include <sys/param.h>
44#include <sys/systm.h> 44#include <sys/systm.h>
45#include <sys/ioctl.h> 45#include <sys/ioctl.h>
46#include <sys/select.h> 46#include <sys/select.h>
47#include <sys/tty.h> 47#include <sys/tty.h>
48#include <sys/buf.h> 48#include <sys/buf.h>
49#include <sys/msgbuf.h> 49#include <sys/msgbuf.h>
@@ -81,38 +81,55 @@ __KERNEL_RCSID(0, "$NetBSD: atari_init.c @@ -81,38 +81,55 @@ __KERNEL_RCSID(0, "$NetBSD: atari_init.c
81 81
82void start_c(int, u_int, u_int, u_int, char *); 82void start_c(int, u_int, u_int, u_int, char *);
83static void atari_hwinit(void); 83static void atari_hwinit(void);
84static void cpu_init_kcorehdr(paddr_t, paddr_t); 84static void cpu_init_kcorehdr(paddr_t, paddr_t);
85static void initcpu(void); 85static void initcpu(void);
86static void mmu030_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t); 86static void mmu030_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t);
87static void map_io_areas(paddr_t, psize_t, u_int); 87static void map_io_areas(paddr_t, psize_t, u_int);
88static void set_machtype(void); 88static void set_machtype(void);
89 89
90#if defined(M68040) || defined(M68060) 90#if defined(M68040) || defined(M68060)
91static void mmu040_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t); 91static void mmu040_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t);
92#endif 92#endif
93 93
 94#if defined(_MILANHW_)
 95static u_int milan_probe_bank_1(paddr_t paddr);
 96static u_int milan_probe_bank(paddr_t paddr);
 97
 98#define NBANK 2
 99#define NSLOT 4
 100
 101#define MB(n) ((n) * 1024 * 1024)
 102#define MB_END(n) (MB(n) - 1)
 103#define MAGIC_4M (4 - 1)
 104#define MAGIC_4M_INV ((uint8_t)~MAGIC_4M)
 105#define MAGIC_8M (8 - 1)
 106#define MAGIC_16M (16 - 1)
 107#define MAGIC_32M (32 - 1)
 108#define MAGIC_64M (64 - 1)
 109#endif
 110
94/* 111/*
95 * Extent maps to manage all memory space, including I/O ranges. Allocate 112 * Extent maps to manage all memory space, including I/O ranges. Allocate
96 * storage for 8 regions in each, initially. Later, iomem_malloc_safe 113 * storage for 16 regions in each, initially. Later, iomem_malloc_safe
97 * will indicate that it's safe to use malloc() to dynamically allocate 114 * will indicate that it's safe to use malloc() to dynamically allocate
98 * region descriptors. 115 * region descriptors.
99 * This means that the fixed static storage is only used for registrating 116 * This means that the fixed static storage is only used for registrating
100 * the found memory regions and the bus-mapping of the console. 117 * the found memory regions and the bus-mapping of the console.
101 * 118 *
102 * The extent maps are not static! They are used for bus address space 119 * The extent maps are not static! They are used for bus address space
103 * allocation. 120 * allocation.
104 */ 121 */
105static long iomem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)]; 122static long iomem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(16) / sizeof(long)];
106struct extent *iomem_ex; 123struct extent *iomem_ex;
107int iomem_malloc_safe; 124int iomem_malloc_safe;
108 125
109/* 126/*
110 * All info needed to generate a panic dump. All fields are setup by 127 * All info needed to generate a panic dump. All fields are setup by
111 * start_c(). 128 * start_c().
112 * XXX: Should sheck usage of phys_segs. There is some unwanted overlap 129 * XXX: Should sheck usage of phys_segs. There is some unwanted overlap
113 * here.... Also, the name is badly choosen. Phys_segs contains the 130 * here.... Also, the name is badly choosen. Phys_segs contains the
114 * segment descriptions _after_ reservations are made. 131 * segment descriptions _after_ reservations are made.
115 * XXX: 'lowram' is obsoleted by the new panicdump format 132 * XXX: 'lowram' is obsoleted by the new panicdump format
116 */ 133 */
117static cpu_kcore_hdr_t cpu_kcore_hdr; 134static cpu_kcore_hdr_t cpu_kcore_hdr;
118 135
@@ -194,43 +211,87 @@ start_c(int id, u_int ttphystart, u_int  @@ -194,43 +211,87 @@ start_c(int id, u_int ttphystart, u_int
194 vaddr_t vstart; /* Next available virtual address */ 211 vaddr_t vstart; /* Next available virtual address */
195 vsize_t avail; 212 vsize_t avail;
196 paddr_t ptpa; 213 paddr_t ptpa;
197 psize_t ptsize; 214 psize_t ptsize;
198 u_int ptextra; 215 u_int ptextra;
199 vaddr_t kva; 216 vaddr_t kva;
200 u_int tc, i; 217 u_int tc, i;
201 pt_entry_t *pg, *epg; 218 pt_entry_t *pg, *epg;
202 pt_entry_t pg_proto; 219 pt_entry_t pg_proto;
203 vaddr_t end_loaded; 220 vaddr_t end_loaded;
204 paddr_t kbase; 221 paddr_t kbase;
205 u_int kstsize; 222 u_int kstsize;
206 paddr_t Sysptmap_pa; 223 paddr_t Sysptmap_pa;
207 
208#if defined(_MILANHW_) 224#if defined(_MILANHW_)
209 /* XXX 225 /*
210 * XXX The right place todo this is probably the booter (Leo) 
211 * XXX More than 16MB memory is not yet supported on the Milan! 
212 * The Milan Lies about the presence of TT-RAM. If you insert 226 * The Milan Lies about the presence of TT-RAM. If you insert
213 * 16MB it is split in 14MB ST starting at address 0 and 2MB TT RAM, 227 * 16MB it is split in 14MB ST starting at address 0 and 2MB TT RAM,
214 * starting at address 16MB.  228 * starting at address 16MB as the BIOS remapping memory using MMU.
 229 *
 230 * Milan actually has four SIMM slots and each slot has two banks,
 231 * so it could have up to 8 memory segment regions.
215 */ 232 */
216 stphysize += ttphysize; 233 const paddr_t simm_base[NBANK][NSLOT] = {
217 ttphysize = ttphystart = 0; 234 /* slot 0-3, bank 0 */
218#endif 235 { 0x00000000, 0x04000000, 0x08000000, 0x0c000000 },
 236 /* slot 0-3, bank 1 */
 237 { 0x10000000, 0x14000000, 0x18000000, 0x1c000000 }
 238 };
 239 int slot, bank, seg;
 240 u_int mb;
 241
 242 /* On Milan, all RAMs are fast 32 bit so no need to reloc kernel */
 243 reloc_kernel = 0;
 244
 245 /* probe memory region in all SIMM slots and banks */
 246 seg = 0;
 247 ttphysize = 0;
 248 for (bank = 0; bank < 2; bank++) {
 249 for (slot = 0; slot < 4; slot++) {
 250 if (bank == 0 && slot == 0) {
 251 /*
 252 * The first bank has at least 16MB because
 253 * the Milan's ROM bootloader requires it
 254 * to allocate ST RAM.
 255 */
 256 mb = milan_probe_bank_1(simm_base[bank][slot]);
 257 boot_segs[0].start = 0;
 258 boot_segs[0].end = MB(mb);
 259 stphysize = MB(mb);
 260 seg++;
 261 } else {
 262 /*
 263 * The rest banks could be empty or
 264 * have 4, 8, 16, 32, or 64MB.
 265 */
 266 mb = milan_probe_bank(simm_base[bank][slot]);
 267 if (mb > 0) {
 268 boot_segs[seg].start =
 269 simm_base[bank][slot];
 270 boot_segs[seg].end =
 271 simm_base[bank][slot] + MB(mb);
 272 ttphysize += MB(mb);
 273 seg++;
 274 }
 275 }
 276 }
 277 }
 278#else /* _MILANHW_ */
219 boot_segs[0].start = 0; 279 boot_segs[0].start = 0;
220 boot_segs[0].end = stphysize; 280 boot_segs[0].end = stphysize;
221 boot_segs[1].start = ttphystart; 281 boot_segs[1].start = ttphystart;
222 boot_segs[1].end = ttphystart + ttphysize; 282 boot_segs[1].end = ttphystart + ttphysize;
223 boot_segs[2].start = boot_segs[2].end = 0; /* End of segments! */ 283 boot_segs[2].start = boot_segs[2].end = 0; /* End of segments! */
 284#endif
224 285
225 /* 286 /*
226 * The following is a hack. We do not know how much ST memory we 287 * The following is a hack. We do not know how much ST memory we
227 * really need until after configuration has finished. At this 288 * really need until after configuration has finished. At this
228 * time I have no idea how to grab ST memory at that time. 289 * time I have no idea how to grab ST memory at that time.
229 * The round_page() call is ment to correct errors made by 290 * The round_page() call is ment to correct errors made by
230 * binpatching! 291 * binpatching!
231 */ 292 */
232 st_pool_size = m68k_round_page(st_pool_size); 293 st_pool_size = m68k_round_page(st_pool_size);
233 st_pool_phys = stphysize - st_pool_size; 294 st_pool_phys = stphysize - st_pool_size;
234 stphysize = st_pool_phys; 295 stphysize = st_pool_phys;
235 296
236 physmem = btoc(stphysize) + btoc(ttphysize); 297 physmem = btoc(stphysize) + btoc(ttphysize);
@@ -474,49 +535,60 @@ start_c(int id, u_int ttphystart, u_int  @@ -474,49 +535,60 @@ start_c(int id, u_int ttphystart, u_int
474 Sysseg_pa += kbase; 535 Sysseg_pa += kbase;
475 Sysptmap_pa += kbase; 536 Sysptmap_pa += kbase;
476 } 537 }
477 538
478 lowram = 0 >> PGSHIFT; /* XXX */ 539 lowram = 0 >> PGSHIFT; /* XXX */
479 540
480 /* 541 /*
481 * Fill in usable segments. The page indexes will be initialized 542 * Fill in usable segments. The page indexes will be initialized
482 * later when all reservations are made. 543 * later when all reservations are made.
483 */ 544 */
484 usable_segs[0].start = 0; 545 usable_segs[0].start = 0;
485 usable_segs[0].end = stphysize; 546 usable_segs[0].end = stphysize;
486 usable_segs[0].free_list = VM_FREELIST_STRAM; 547 usable_segs[0].free_list = VM_FREELIST_STRAM;
 548#if defined(_MILANHW_)
 549 for (i = 1; i < seg; i++) {
 550 usable_segs[i].start = boot_segs[i].start;
 551 usable_segs[i].end = boot_segs[i].end;
 552 usable_segs[i].free_list = VM_FREELIST_TTRAM;
 553 }
 554 for (; i < NMEM_SEGS; i++) {
 555 usable_segs[i].start = usable_segs[i].end = 0;
 556 }
 557#else
487 usable_segs[1].start = ttphystart; 558 usable_segs[1].start = ttphystart;
488 usable_segs[1].end = ttphystart + ttphysize; 559 usable_segs[1].end = ttphystart + ttphysize;
489 usable_segs[1].free_list = VM_FREELIST_TTRAM; 560 usable_segs[1].free_list = VM_FREELIST_TTRAM;
490 usable_segs[2].start = usable_segs[2].end = 0; /* End of segments! */ 561 usable_segs[2].start = usable_segs[2].end = 0; /* End of segments! */
 562#endif
491 563
492 if (kbase) { 564 if (kbase) {
493 /* 565 /*
494 * First page of ST-ram is unusable, reserve the space 566 * First page of ST-ram is unusable, reserve the space
495 * for the kernel in the TT-ram segment. 567 * for the kernel in the TT-ram segment.
496 * Note: Because physical page-zero is partially mapped to ROM 568 * Note: Because physical page-zero is partially mapped to ROM
497 * by hardware, it is unusable. 569 * by hardware, it is unusable.
498 */ 570 */
499 usable_segs[0].start = PAGE_SIZE; 571 usable_segs[0].start = PAGE_SIZE;
500 usable_segs[1].start += pstart; 572 usable_segs[1].start += pstart;
501 } else 573 } else
502 usable_segs[0].start += pstart; 574 usable_segs[0].start += pstart;
503 575
504 /* 576 /*
505 * As all segment sizes are now valid, calculate page indexes and 577 * As all segment sizes are now valid, calculate page indexes and
506 * available physical memory. 578 * available physical memory.
507 */ 579 */
508 usable_segs[0].first_page = 0; 580 usable_segs[0].first_page = 0;
509 for (i = 1; usable_segs[i].start; i++) { 581 for (i = 1; i < NMEM_SEGS && usable_segs[i].start; i++) {
510 usable_segs[i].first_page = usable_segs[i-1].first_page; 582 usable_segs[i].first_page = usable_segs[i-1].first_page;
511 usable_segs[i].first_page += 583 usable_segs[i].first_page +=
512 (usable_segs[i-1].end - usable_segs[i-1].start) / PAGE_SIZE; 584 (usable_segs[i-1].end - usable_segs[i-1].start) / PAGE_SIZE;
513 } 585 }
514 for (i = 0, physmem = 0; usable_segs[i].start; i++) 586 for (i = 0, physmem = 0; usable_segs[i].start; i++)
515 physmem += usable_segs[i].end - usable_segs[i].start; 587 physmem += usable_segs[i].end - usable_segs[i].start;
516 physmem >>= PGSHIFT; 588 physmem >>= PGSHIFT;
517 589
518 /* 590 /*
519 * get the pmap module in sync with reality. 591 * get the pmap module in sync with reality.
520 */ 592 */
521 pmap_bootstrap(vstart); 593 pmap_bootstrap(vstart);
522 594
@@ -599,41 +671,186 @@ start_c(int id, u_int ttphystart, u_int  @@ -599,41 +671,186 @@ start_c(int id, u_int ttphystart, u_int
599 * descriptor storage has already been allocated). 671 * descriptor storage has already been allocated).
600 * 672 *
601 * N.B. The iomem extent manages _all_ physical addresses 673 * N.B. The iomem extent manages _all_ physical addresses
602 * on the machine. When the amount of RAM is found, all 674 * on the machine. When the amount of RAM is found, all
603 * extents of RAM are allocated from the map. 675 * extents of RAM are allocated from the map.
604 */ 676 */
605 iomem_ex = extent_create("iomem", 0x0, 0xffffffff, 677 iomem_ex = extent_create("iomem", 0x0, 0xffffffff,
606 (void *)iomem_ex_storage, sizeof(iomem_ex_storage), 678 (void *)iomem_ex_storage, sizeof(iomem_ex_storage),
607 EX_NOCOALESCE|EX_NOWAIT); 679 EX_NOCOALESCE|EX_NOWAIT);
608 680
609 /* 681 /*
610 * Allocate the physical RAM from the extent map 682 * Allocate the physical RAM from the extent map
611 */ 683 */
612 for (i = 0; boot_segs[i].end != 0; i++) { 684 for (i = 0; i < NMEM_SEGS && boot_segs[i].end != 0; i++) {
613 if (extent_alloc_region(iomem_ex, boot_segs[i].start, 685 if (extent_alloc_region(iomem_ex, boot_segs[i].start,
614 boot_segs[i].end - boot_segs[i].start, EX_NOWAIT)) { 686 boot_segs[i].end - boot_segs[i].start, EX_NOWAIT)) {
615 /* XXX: Ahum, should not happen ;-) */ 687 /* XXX: Ahum, should not happen ;-) */
616 printf("Warning: Cannot allocate boot memory from" 688 printf("Warning: Cannot allocate boot memory from"
617 " extent map!?\n"); 689 " extent map!?\n");
618 } 690 }
619 } 691 }
620 692
621 /* 693 /*
622 * Initialize interrupt mapping. 694 * Initialize interrupt mapping.
623 */ 695 */
624 intr_init(); 696 intr_init();
625} 697}
626 698
 699#if defined(_MILANHW_)
 700/*
 701 * Probe and return available memory size in MB at specfied address.
 702 * The first slot SIMM have at least 16MB, so check if it has 32 or 64 MB.
 703 *
 704 * Note it seems Milan does not generate bus errors on accesses against
 705 * address regions where memory doesn't exist, but it returns memory images
 706 * of lower address of the bank.
 707 */
 708static u_int
 709milan_probe_bank_1(paddr_t start_paddr)
 710{
 711 volatile uint8_t *base;
 712 u_int mb;
 713 uint8_t save_16, save_32, save_64;
 714
 715 /* Assume that this bank has at least 16MB */
 716 mb = 16;
 717
 718 base = (uint8_t *)start_paddr;
 719
 720 /* save and write a MAGIC at the end of 16MB region */
 721 save_16 = base[MB_END(16)];
 722 base[MB_END(16)] = MAGIC_16M;
 723
 724 /* check bus error at the end of 32MB region */
 725 if (badbaddr(__UNVOLATILE(base + MB_END(32)), sizeof(uint8_t))) {
 726 /* bus error; assume no memory there */
 727 goto out16;
 728 }
 729
 730 /* check if the 32MB region is not image of the prior 16MB region */
 731 save_32 = base[MB_END(32)];
 732 base[MB_END(32)] = MAGIC_32M;
 733 if (base[MB_END(32)] != MAGIC_32M || base[MB_END(16)] != MAGIC_16M) {
 734 /* no memory or image at the 32MB region */
 735 goto out16;
 736 }
 737 /* we have at least 32MB */
 738 mb = 32;
 739
 740 /* check bus error at the end of 64MB region */
 741 if (badbaddr(__UNVOLATILE(base + MB_END(64)), sizeof(uint8_t))) {
 742 /* bus error; assume no memory there */
 743 goto out32;
 744 }
 745
 746 /* check if the 64MB region is not image of the prior 32MB region */
 747 save_64 = base[MB_END(64)];
 748 base[MB_END(64)] = MAGIC_64M;
 749 if (base[MB_END(64)] != MAGIC_64M || base[MB_END(32)] != MAGIC_32M) {
 750 /* no memory or image at the 64MB region */
 751 goto out32;
 752 }
 753 /* we have 64MB */
 754 mb = 64;
 755 base[MB_END(64)] = save_64;
 756 out32:
 757 base[MB_END(32)] = save_32;
 758 out16:
 759 base[MB_END(16)] = save_16;
 760
 761 return mb;
 762}
 763
 764/*
 765 * Probe and return available memory size in MB at specfied address.
 766 * The rest slot could be empty so check all possible size.
 767 */
 768static u_int
 769milan_probe_bank(paddr_t start_paddr)
 770{
 771 volatile uint8_t *base;
 772 u_int mb;
 773 uint8_t save_4, save_8, save_16;
 774
 775 /* The rest banks might have no memory */
 776 mb = 0;
 777
 778 base = (uint8_t *)start_paddr;
 779
 780 /* check bus error at the end of 4MB region */
 781 if (badbaddr(__UNVOLATILE(base + MB_END(4)), sizeof(uint8_t))) {
 782 /* bus error; assume no memory there */
 783 goto out;
 784 }
 785
 786 /* check if the 4MB region has memory */
 787 save_4 = base[MB_END(4)];
 788 base[MB_END(4)] = MAGIC_4M_INV;
 789 if (base[MB_END(4)] != MAGIC_4M_INV) {
 790 /* no memory */
 791 goto out;
 792 }
 793 base[MB_END(4)] = MAGIC_4M;
 794 if (base[MB_END(4)] != MAGIC_4M) {
 795 /* no memory */
 796 goto out;
 797 }
 798 /* we have at least 4MB */
 799 mb = 4;
 800
 801 /* check bus error at the end of 8MB region */
 802 if (badbaddr(__UNVOLATILE(base + MB_END(8)), sizeof(uint8_t))) {
 803 /* bus error; assume no memory there */
 804 goto out4;
 805 }
 806
 807 /* check if the 8MB region is not image of the prior 4MB region */
 808 save_8 = base[MB_END(8)];
 809 base[MB_END(8)] = MAGIC_8M;
 810 if (base[MB_END(8)] != MAGIC_8M || base[MB_END(4)] != MAGIC_4M) {
 811 /* no memory or image at the 8MB region */
 812 goto out4;
 813 }
 814 /* we have at least 8MB */
 815 mb = 8;
 816
 817 /* check bus error at the end of 16MB region */
 818 if (badbaddr(__UNVOLATILE(base + MB_END(16)), sizeof(uint8_t))) {
 819 /* bus error; assume no memory there */
 820 goto out8;
 821 }
 822
 823 /* check if the 16MB region is not image of the prior 8MB region */
 824 save_16 = base[MB_END(16)];
 825 base[MB_END(16)] = MAGIC_16M;
 826 if (base[MB_END(16)] != MAGIC_16M || base[MB_END(8)] != MAGIC_8M) {
 827 /* no memory or image at the 32MB region */
 828 goto out8;
 829 }
 830 /* we have at least 16MB, so check more region as the first bank */
 831 mb = milan_probe_bank_1(start_paddr);
 832
 833 base[MB_END(16)] = save_16;
 834 out8:
 835 base[MB_END(8)] = save_8;
 836 out4:
 837 base[MB_END(4)] = save_4;
 838 out:
 839
 840 return mb;
 841}
 842#endif /* _MILANHW_ */
 843
627/* 844/*
628 * Try to figure out on what type of machine we are running 845 * Try to figure out on what type of machine we are running
629 * Note: This module runs *before* the io-mapping is setup! 846 * Note: This module runs *before* the io-mapping is setup!
630 */ 847 */
631static void 848static void
632set_machtype(void) 849set_machtype(void)
633{ 850{
634 851
635#ifdef _MILANHW_ 852#ifdef _MILANHW_
636 machineid |= ATARI_MILAN; 853 machineid |= ATARI_MILAN;
637 854
638#else 855#else
639 stio_addr = 0xff8000; /* XXX: For TT & Falcon only */ 856 stio_addr = 0xff8000; /* XXX: For TT & Falcon only */

cvs diff -r1.58 -r1.58.12.1 src/sys/arch/atari/atari/bus.c (expand / switch to unified diff)

--- src/sys/arch/atari/atari/bus.c 2014/10/18 08:33:24 1.58
+++ src/sys/arch/atari/atari/bus.c 2018/03/13 13:41:13 1.58.12.1
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: bus.c,v 1.58 2014/10/18 08:33:24 snj Exp $ */ 1/* $NetBSD: bus.c,v 1.58.12.1 2018/03/13 13:41:13 martin Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center and by Chris G. Demetriou. 9 * NASA Ames Research Center and by Chris G. Demetriou.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions 12 * modification, are permitted provided that the following conditions
13 * are met: 13 * are met:
14 * 1. Redistributions of source code must retain the above copyright 14 * 1. Redistributions of source code must retain the above copyright
@@ -23,27 +23,27 @@ @@ -23,27 +23,27 @@
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE. 30 * POSSIBILITY OF SUCH DAMAGE.
31 */ 31 */
32 32
33#include "opt_m68k_arch.h" 33#include "opt_m68k_arch.h"
34 34
35#include <sys/cdefs.h> 35#include <sys/cdefs.h>
36__KERNEL_RCSID(0, "$NetBSD: bus.c,v 1.58 2014/10/18 08:33:24 snj Exp $"); 36__KERNEL_RCSID(0, "$NetBSD: bus.c,v 1.58.12.1 2018/03/13 13:41:13 martin Exp $");
37 37
38#include <sys/param.h> 38#include <sys/param.h>
39#include <sys/systm.h> 39#include <sys/systm.h>
40#include <sys/extent.h> 40#include <sys/extent.h>
41#include <sys/malloc.h> 41#include <sys/malloc.h>
42#include <sys/mbuf.h> 42#include <sys/mbuf.h>
43#include <sys/proc.h> 43#include <sys/proc.h>
44 44
45#include <uvm/uvm.h> 45#include <uvm/uvm.h>
46 46
47#include <machine/cpu.h> 47#include <machine/cpu.h>
48#include <m68k/cacheops.h> 48#include <m68k/cacheops.h>
49#define _ATARI_BUS_DMA_PRIVATE 49#define _ATARI_BUS_DMA_PRIVATE
@@ -241,27 +241,27 @@ bus_mem_add_mapping(bus_space_tag_t t, b @@ -241,27 +241,27 @@ bus_mem_add_mapping(bus_space_tag_t t, b
241 } 241 }
242 242
243 va = uvm_km_alloc(kernel_map, endpa - pa, 0, 243 va = uvm_km_alloc(kernel_map, endpa - pa, 0,
244 UVM_KMF_VAONLY | UVM_KMF_NOWAIT); 244 UVM_KMF_VAONLY | UVM_KMF_NOWAIT);
245 if (va == 0) 245 if (va == 0)
246 return ENOMEM; 246 return ENOMEM;
247 247
248 *bshp = va + (bpa & PGOFSET); 248 *bshp = va + (bpa & PGOFSET);
249 249
250 for (; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) { 250 for (; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
251 u_int *ptep, npte; 251 u_int *ptep, npte;
252 252
253 pmap_enter(pmap_kernel(), (vaddr_t)va, pa, 253 pmap_enter(pmap_kernel(), (vaddr_t)va, pa,
254 VM_PROT_READ|VM_PROT_WRITE, PMAP_WIRED); 254 VM_PROT_READ|VM_PROT_WRITE, VM_PROT_READ|VM_PROT_WRITE);
255 255
256 ptep = kvtopte(va); 256 ptep = kvtopte(va);
257 npte = *ptep & ~PG_CMASK; 257 npte = *ptep & ~PG_CMASK;
258 258
259 if ((flags & BUS_SPACE_MAP_CACHEABLE) == 0) 259 if ((flags & BUS_SPACE_MAP_CACHEABLE) == 0)
260 npte |= PG_CI; 260 npte |= PG_CI;
261 else if (mmutype == MMU_68040) 261 else if (mmutype == MMU_68040)
262 npte |= PG_CCB; 262 npte |= PG_CCB;
263 263
264 *ptep = npte; 264 *ptep = npte;
265 } 265 }
266 pmap_update(pmap_kernel()); 266 pmap_update(pmap_kernel());
267 TBIAS(); 267 TBIAS();
@@ -538,66 +538,223 @@ _bus_dmamap_unload(bus_dma_tag_t t, bus_ @@ -538,66 +538,223 @@ _bus_dmamap_unload(bus_dma_tag_t t, bus_
538 * No resources to free; just mark the mappings as 538 * No resources to free; just mark the mappings as
539 * invalid. 539 * invalid.
540 */ 540 */
541 map->dm_maxsegsz = map->_dm_maxmaxsegsz; 541 map->dm_maxsegsz = map->_dm_maxmaxsegsz;
542 map->dm_mapsize = 0; 542 map->dm_mapsize = 0;
543 map->dm_nsegs = 0; 543 map->dm_nsegs = 0;
544} 544}
545 545
546/* 546/*
547 * Common function for DMA map synchronization. May be called 547 * Common function for DMA map synchronization. May be called
548 * by bus-specific DMA map synchronization functions. 548 * by bus-specific DMA map synchronization functions.
549 */ 549 */
550void 550void
551_bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t off, 551_bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
552 bus_size_t len, int ops) 552 bus_size_t len, int ops)
553{ 553{
554#if defined(M68040) || defined(M68060) 554#if defined(M68040) || defined(M68060)
555 int i, pa_off, inc, seglen; 555 bus_addr_t p, e, ps, pe;
556 u_long pa, end_pa; 556 bus_size_t seglen;
 557 bus_dma_segment_t *seg;
 558 int i;
 559#endif
557 560
558 pa_off = t->_displacement; 561#if defined(M68020) || defined(M68030)
 562#if defined(M68040) || defined(M68060)
 563 if (cputype == CPU_68020 || cputype == CPU_68030)
 564#endif
 565 /* assume no L2 physical cache */
 566 return;
 567#endif
559 568
560 /* Flush granularity */ 569#if defined(M68040) || defined(M68060)
561 inc = (len > 1024) ? PAGE_SIZE : 16; 570 /* If the whole DMA map is uncached, do nothing. */
 571 if ((map->_dm_flags & BUS_DMA_COHERENT) != 0)
 572 return;
 573
 574 /* Short-circuit for unsupported `ops' */
 575 if ((ops & (BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE)) == 0)
 576 return;
562 577
563 for (i = 0; i < map->dm_nsegs && len > 0; i++) { 578 /*
564 if (map->dm_segs[i].ds_len <= off) { 579 * flush/purge the cache.
 580 */
 581 for (i = 0; i < map->dm_nsegs && len != 0; i++) {
 582 seg = &map->dm_segs[i];
 583 if (seg->ds_len <= offset) {
565 /* Segment irrelevant - before requested offset */ 584 /* Segment irrelevant - before requested offset */
566 off -= map->dm_segs[i].ds_len; 585 offset -= seg->ds_len;
567 continue; 586 continue;
568 } 587 }
569 seglen = map->dm_segs[i].ds_len - off; 588
 589 /*
 590 * Now at the first segment to sync; nail
 591 * each segment until we have exhausted the
 592 * length.
 593 */
 594 seglen = seg->ds_len - offset;
570 if (seglen > len) 595 if (seglen > len)
571 seglen = len; 596 seglen = len;
572 len -= seglen; 
573 pa = map->dm_segs[i].ds_addr + off - pa_off; 
574 end_pa = pa + seglen; 
575 597
576 if (inc == 16) { 598 ps = seg->ds_addr + offset;
577 pa &= ~15; 599 pe = ps + seglen;
578 while (pa < end_pa) { 600
579 DCFL(pa); 601 if (ops & BUS_DMASYNC_PREWRITE) {
580 pa += 16; 602 p = ps & ~CACHELINE_MASK;
 603 e = (pe + CACHELINE_MASK) & ~CACHELINE_MASK;
 604
 605 /* flush cacheline */
 606 while ((p < e) && (p & (CACHELINE_SIZE * 8 - 1)) != 0) {
 607 DCFL(p);
 608 p += CACHELINE_SIZE;
581 } 609 }
582 } else { 610
583 pa &= ~PGOFSET; 611 /* flush cachelines per 128bytes */
584 while (pa < end_pa) { 612 while ((p < e) && (p & PAGE_MASK) != 0) {
585 DCFP(pa); 613 DCFL(p);
586 pa += PAGE_SIZE; 614 p += CACHELINE_SIZE;
 615 DCFL(p);
 616 p += CACHELINE_SIZE;
 617 DCFL(p);
 618 p += CACHELINE_SIZE;
 619 DCFL(p);
 620 p += CACHELINE_SIZE;
 621 DCFL(p);
 622 p += CACHELINE_SIZE;
 623 DCFL(p);
 624 p += CACHELINE_SIZE;
 625 DCFL(p);
 626 p += CACHELINE_SIZE;
 627 DCFL(p);
 628 p += CACHELINE_SIZE;
 629 }
 630
 631 /* flush page */
 632 while (p + PAGE_SIZE <= e) {
 633 DCFP(p);
 634 p += PAGE_SIZE;
 635 }
 636
 637 /* flush cachelines per 128bytes */
 638 while (p + CACHELINE_SIZE * 8 <= e) {
 639 DCFL(p);
 640 p += CACHELINE_SIZE;
 641 DCFL(p);
 642 p += CACHELINE_SIZE;
 643 DCFL(p);
 644 p += CACHELINE_SIZE;
 645 DCFL(p);
 646 p += CACHELINE_SIZE;
 647 DCFL(p);
 648 p += CACHELINE_SIZE;
 649 DCFL(p);
 650 p += CACHELINE_SIZE;
 651 DCFL(p);
 652 p += CACHELINE_SIZE;
 653 DCFL(p);
 654 p += CACHELINE_SIZE;
 655 }
 656
 657 /* flush cacheline */
 658 while (p < e) {
 659 DCFL(p);
 660 p += CACHELINE_SIZE;
587 } 661 }
588 } 662 }
 663
 664 /*
 665 * Normally, the `PREREAD' flag instructs us to purge the
 666 * cache for the specified offset and length. However, if
 667 * the offset/length is not aligned to a cacheline boundary,
 668 * we may end up purging some legitimate data from the
 669 * start/end of the cache. In such a case, *flush* the
 670 * cachelines at the start and end of the required region.
 671 */
 672 else if (ops & BUS_DMASYNC_PREREAD) {
 673 /* flush cacheline on start boundary */
 674 if (ps & CACHELINE_MASK) {
 675 DCFL(ps & ~CACHELINE_MASK);
 676 }
 677
 678 p = (ps + CACHELINE_MASK) & ~CACHELINE_MASK;
 679 e = pe & ~CACHELINE_MASK;
 680
 681 /* purge cacheline */
 682 while ((p < e) && (p & (CACHELINE_SIZE * 8 - 1)) != 0) {
 683 DCPL(p);
 684 p += CACHELINE_SIZE;
 685 }
 686
 687 /* purge cachelines per 128bytes */
 688 while ((p < e) && (p & PAGE_MASK) != 0) {
 689 DCPL(p);
 690 p += CACHELINE_SIZE;
 691 DCPL(p);
 692 p += CACHELINE_SIZE;
 693 DCPL(p);
 694 p += CACHELINE_SIZE;
 695 DCPL(p);
 696 p += CACHELINE_SIZE;
 697 DCPL(p);
 698 p += CACHELINE_SIZE;
 699 DCPL(p);
 700 p += CACHELINE_SIZE;
 701 DCPL(p);
 702 p += CACHELINE_SIZE;
 703 DCPL(p);
 704 p += CACHELINE_SIZE;
 705 }
 706
 707 /* purge page */
 708 while (p + PAGE_SIZE <= e) {
 709 DCPP(p);
 710 p += PAGE_SIZE;
 711 }
 712
 713 /* purge cachelines per 128bytes */
 714 while (p + CACHELINE_SIZE * 8 <= e) {
 715 DCPL(p);
 716 p += CACHELINE_SIZE;
 717 DCPL(p);
 718 p += CACHELINE_SIZE;
 719 DCPL(p);
 720 p += CACHELINE_SIZE;
 721 DCPL(p);
 722 p += CACHELINE_SIZE;
 723 DCPL(p);
 724 p += CACHELINE_SIZE;
 725 DCPL(p);
 726 p += CACHELINE_SIZE;
 727 DCPL(p);
 728 p += CACHELINE_SIZE;
 729 DCPL(p);
 730 p += CACHELINE_SIZE;
 731 }
 732
 733 /* purge cacheline */
 734 while (p < e) {
 735 DCPL(p);
 736 p += CACHELINE_SIZE;
 737 }
 738
 739 /* flush cacheline on end boundary */
 740 if (p < pe) {
 741 DCFL(p);
 742 }
 743 }
 744 offset = 0;
 745 len -= seglen;
589 } 746 }
590#endif 747#endif /* defined(M68040) || defined(M68060) */
591} 748}
592 749
593/* 750/*
594 * Common function for DMA-safe memory allocation. May be called 751 * Common function for DMA-safe memory allocation. May be called
595 * by bus-specific DMA memory allocation functions. 752 * by bus-specific DMA memory allocation functions.
596 */ 753 */
597int 754int
598bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment, 755bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
599 bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs, 756 bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
600 int flags) 757 int flags)
601{ 758{
602 759
603 return bus_dmamem_alloc_range(t, size, alignment, boundary, 760 return bus_dmamem_alloc_range(t, size, alignment, boundary,
@@ -657,27 +814,27 @@ bus_dmamem_map(bus_dma_tag_t t, bus_dma_ @@ -657,27 +814,27 @@ bus_dmamem_map(bus_dma_tag_t t, bus_dma_
657 if (va == 0) 814 if (va == 0)
658 return ENOMEM; 815 return ENOMEM;
659 816
660 *kvap = (void *)va; 817 *kvap = (void *)va;
661 818
662 for (curseg = 0; curseg < nsegs; curseg++) { 819 for (curseg = 0; curseg < nsegs; curseg++) {
663 for (addr = segs[curseg].ds_addr; 820 for (addr = segs[curseg].ds_addr;
664 addr < (segs[curseg].ds_addr + segs[curseg].ds_len); 821 addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
665 addr += PAGE_SIZE, va += PAGE_SIZE, size -= PAGE_SIZE) { 822 addr += PAGE_SIZE, va += PAGE_SIZE, size -= PAGE_SIZE) {
666 if (size == 0) 823 if (size == 0)
667 panic("_bus_dmamem_map: size botch"); 824 panic("_bus_dmamem_map: size botch");
668 pmap_enter(pmap_kernel(), va, addr - offset, 825 pmap_enter(pmap_kernel(), va, addr - offset,
669 VM_PROT_READ | VM_PROT_WRITE, 826 VM_PROT_READ | VM_PROT_WRITE,
670 VM_PROT_READ | VM_PROT_WRITE | PMAP_WIRED); 827 VM_PROT_READ | VM_PROT_WRITE);
671 } 828 }
672 } 829 }
673 pmap_update(pmap_kernel()); 830 pmap_update(pmap_kernel());
674 831
675 return 0; 832 return 0;
676} 833}
677 834
678/* 835/*
679 * Common function for unmapping DMA-safe memory. May be called by 836 * Common function for unmapping DMA-safe memory. May be called by
680 * bus-specific DMA memory unmapping functions. 837 * bus-specific DMA memory unmapping functions.
681 */ 838 */
682void 839void
683bus_dmamem_unmap(bus_dma_tag_t t, void *kva, size_t size) 840bus_dmamem_unmap(bus_dma_tag_t t, void *kva, size_t size)

cvs diff -r1.110 -r1.110.40.1 src/sys/arch/atari/atari/locore.s (expand / switch to unified diff)

--- src/sys/arch/atari/atari/locore.s 2011/12/22 15:33:28 1.110
+++ src/sys/arch/atari/atari/locore.s 2018/03/13 13:41:13 1.110.40.1
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: locore.s,v 1.110 2011/12/22 15:33:28 tsutsui Exp $ */ 1/* $NetBSD: locore.s,v 1.110.40.1 2018/03/13 13:41:13 martin Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 1988 University of Utah. 4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1980, 1990 The Regents of the University of California. 5 * Copyright (c) 1980, 1990 The Regents of the University of California.
6 * All rights reserved. 6 * All rights reserved.
7 * 7 *
8 * This code is derived from software contributed to Berkeley by 8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer 9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department. 10 * Science Department.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions 13 * modification, are permitted provided that the following conditions
14 * are met: 14 * are met:
@@ -389,27 +389,27 @@ ENTRY_NOPROFILE(lev6intr) @@ -389,27 +389,27 @@ ENTRY_NOPROFILE(lev6intr)
389 oriw #0x0700,%sr 389 oriw #0x0700,%sr
390 movl %d0,%a0@(PLX_CNTRL) 390 movl %d0,%a0@(PLX_CNTRL)
391 movq #0,%d1 | clear upper bits 391 movq #0,%d1 | clear upper bits
392 | Read any (uncached!) PCI address 392 | Read any (uncached!) PCI address
393 | to fetch vector number 393 | to fetch vector number
394 movl _C_LABEL(pci_mem_uncached),%a1 394 movl _C_LABEL(pci_mem_uncached),%a1
395 movb %a1@,%d1 395 movb %a1@,%d1
396 orw #0x0600,%d0 | Change PCI command code back 396 orw #0x0600,%d0 | Change PCI command code back
397 movel %d0,%a0@(PLX_CNTRL) | to Read Cycle 397 movel %d0,%a0@(PLX_CNTRL) | to Read Cycle
398 movew %d2,%sr | Re-enable interrupts 398 movew %d2,%sr | Re-enable interrupts
399 movel %d1,%sp@- | Call handler 399 movel %d1,%sp@- | Call handler
400 jbsr _C_LABEL(milan_isa_intr) 400 jbsr _C_LABEL(milan_isa_intr)
401 addql #8,%sp 401 addql #8,%sp
402 INTERRUPT_RESTOREREG 402 moveml %sp@+,%d0-%d2/%a0-%a1
403 subql #1,_C_LABEL(idepth) 403 subql #1,_C_LABEL(idepth)
404 jra _ASM_LABEL(rei) 404 jra _ASM_LABEL(rei)
405 405
406/* 406/*
407 * Support functions for reading and writing the Milan PCI config space. 407 * Support functions for reading and writing the Milan PCI config space.
408 * Of interest: 408 * Of interest:
409 * - We need exclusive access to the PLX9080 during config space 409 * - We need exclusive access to the PLX9080 during config space
410 * access, hence the splhigh(). 410 * access, hence the splhigh().
411 * - The 'confread' function shortcircuits the NMI to make probes to 411 * - The 'confread' function shortcircuits the NMI to make probes to
412 * unexplored pci-config space possible. 412 * unexplored pci-config space possible.
413 */ 413 */
414ENTRY(milan_pci_confread) 414ENTRY(milan_pci_confread)
415 movl %sp@(4),%d0 | get tag and regno 415 movl %sp@(4),%d0 | get tag and regno
@@ -440,41 +440,39 @@ ENTRY(milan_pci_confwrite) @@ -440,41 +440,39 @@ ENTRY(milan_pci_confwrite)
440 movw %sr,%d1 | goto splhigh 440 movw %sr,%d1 | goto splhigh
441 oriw #0x0700,%sr 441 oriw #0x0700,%sr
442 movl %d0,%a0@(PLX_DMCFGA) | write tag to the config register 442 movl %d0,%a0@(PLX_DMCFGA) | write tag to the config register
443 movl _C_LABEL(pci_io_addr),%a1 443 movl _C_LABEL(pci_io_addr),%a1
444 movl %sp@(8),%a1@ | write value 444 movl %sp@(8),%a1@ | write value
445 movl #0,%a0@(PLX_DMCFGA) | back to normal PCI access 445 movl #0,%a0@(PLX_DMCFGA) | back to normal PCI access
446 movw %d1,%sr | splx 446 movw %d1,%sr | splx
447 rts 447 rts
448 448
449ENTRY_NOPROFILE(lev7intr) 449ENTRY_NOPROFILE(lev7intr)
450 tstl _ASM_LABEL(plx_nonmi) | milan_conf_read shortcut 450 tstl _ASM_LABEL(plx_nonmi) | milan_conf_read shortcut
451 jne 1f | .... get out immediately 451 jne 1f | .... get out immediately
452 INTERRUPT_SAVEREG 452 INTERRUPT_SAVEREG
453 moveml %d0-%d1/%a0-%a1,%sp@- 
454 movl _C_LABEL(stio_addr),%a0 | get KVA of ST-IO area 453 movl _C_LABEL(stio_addr),%a0 | get KVA of ST-IO area
455 movw %a0@(PLX_PCICR),_C_LABEL(plx_status) 454 movw %a0@(PLX_PCICR),_C_LABEL(plx_status)
456 movw #0xf900,%a0@(PLX_PCICR) | Clear error bits 455 movw #0xf900,%a0@(PLX_PCICR) | Clear error bits
457 jbsr _C_LABEL(nmihandler) | notify... 456 jbsr _C_LABEL(nmihandler) | notify...
458 INTERRUPT_RESTOREREG 457 INTERRUPT_RESTOREREG
459 addql #1,_C_LABEL(intrcnt)+28 | add another nmi interrupt 458 addql #1,_C_LABEL(intrcnt)+28 | add another nmi interrupt
4601: 4591:
461 rte | all done 460 rte | all done
462#endif /* _MILANHW_ */ 461#endif /* _MILANHW_ */
463 462
464ENTRY_NOPROFILE(lev3intr) 463ENTRY_NOPROFILE(lev3intr)
465ENTRY_NOPROFILE(badtrap) 464ENTRY_NOPROFILE(badtrap)
466 addql #1,_C_LABEL(idepth) 465 addql #1,_C_LABEL(idepth)
467 moveml #0xC0C0,%sp@- | save scratch regs 
468 INTERRUPT_SAVEREG 466 INTERRUPT_SAVEREG
469 movw %sp@(22),%sp@- | push exception vector info 467 movw %sp@(22),%sp@- | push exception vector info
470 clrw %sp@- 468 clrw %sp@-
471 movl %sp@(22),%sp@- | and PC 469 movl %sp@(22),%sp@- | and PC
472 jbsr _C_LABEL(straytrap) | report 470 jbsr _C_LABEL(straytrap) | report
473 addql #8,%sp | pop args 471 addql #8,%sp | pop args
474 INTERRUPT_RESTOREREG | restore regs 472 INTERRUPT_RESTOREREG | restore regs
475 subql #1,_C_LABEL(idepth) 473 subql #1,_C_LABEL(idepth)
476 jra _ASM_LABEL(rei) | all done 474 jra _ASM_LABEL(rei) | all done
477 475
478ENTRY_NOPROFILE(badmfpint) 476ENTRY_NOPROFILE(badmfpint)
479 addql #1,_C_LABEL(idepth) 477 addql #1,_C_LABEL(idepth)
480 INTERRUPT_SAVEREG | save scratch regs 478 INTERRUPT_SAVEREG | save scratch regs

cvs diff -r1.8 -r1.8.8.1 src/sys/arch/atari/atari/pmap_bootstrap.c (expand / switch to unified diff)

--- src/sys/arch/atari/atari/pmap_bootstrap.c 2016/12/22 14:47:54 1.8
+++ src/sys/arch/atari/atari/pmap_bootstrap.c 2018/03/13 13:41:13 1.8.8.1
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: pmap_bootstrap.c,v 1.8 2016/12/22 14:47:54 cherry Exp $ */ 1/* $NetBSD: pmap_bootstrap.c,v 1.8.8.1 2018/03/13 13:41:13 martin Exp $ */
2/*- 2/*-
3 * Copyright (c) 1999 The NetBSD Foundation, Inc. 3 * Copyright (c) 1999 The NetBSD Foundation, Inc.
4 * All rights reserved. 4 * All rights reserved.
5 * 5 *
6 * This code is derived from software contributed to The NetBSD Foundation 6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Jason R. Thorpe. 7 * by Jason R. Thorpe.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -103,46 +103,46 @@ pmap_bootstrap(vaddr_t vstart) @@ -103,46 +103,46 @@ pmap_bootstrap(vaddr_t vstart)
103{ 103{
104 vaddr_t va; 104 vaddr_t va;
105 int i; 105 int i;
106 106
107 /* 107 /*
108 * Announce page-size to the VM-system 108 * Announce page-size to the VM-system
109 */ 109 */
110 uvmexp.pagesize = NBPG; 110 uvmexp.pagesize = NBPG;
111 uvm_md_init(); 111 uvm_md_init();
112 112
113 /* 113 /*
114 * Setup physical address ranges 114 * Setup physical address ranges
115 */ 115 */
116 for (i = 0; usable_segs[i + 1].start; i++) 116 for (i = 0; i < NMEM_SEGS && usable_segs[i].start; i++)
117 ; 117 continue;
118 /* XXX: allow for msgbuf */ 118 /* XXX: allow for msgbuf */
119 usable_segs[i].end -= m68k_round_page(MSGBUFSIZE); 119 usable_segs[i - 1].end -= m68k_round_page(MSGBUFSIZE);
120 msgbufpa = usable_segs[i].end; 120 msgbufpa = usable_segs[i - 1].end;
121 121
122 /* 122 /*
123 * Count physical memory 123 * Count physical memory
124 */ 124 */
125 mem_size = 0; 125 mem_size = 0;
126 for (i = 0; i < NMEM_SEGS; i++) { 126 for (i = 0; i < NMEM_SEGS; i++) {
127 if (boot_segs[i].start == boot_segs[i].end) 127 if (boot_segs[i].start == boot_segs[i].end)
128 break; 128 break;
129 mem_size += boot_segs[i].end - boot_segs[i].start; 129 mem_size += boot_segs[i].end - boot_segs[i].start;
130 } 130 }
131 131
132 /* 132 /*
133 * Announce available memory to the VM-system 133 * Announce available memory to the VM-system
134 */ 134 */
135 for (i = 0; usable_segs[i].start; i++) 135 for (i = 0; i < NMEM_SEGS && usable_segs[i].start; i++)
136 uvm_page_physload(atop(usable_segs[i].start), 136 uvm_page_physload(atop(usable_segs[i].start),
137 atop(usable_segs[i].end), 137 atop(usable_segs[i].end),
138 atop(usable_segs[i].start), 138 atop(usable_segs[i].start),
139 atop(usable_segs[i].end), 139 atop(usable_segs[i].end),
140 usable_segs[i].free_list); 140 usable_segs[i].free_list);
141 141
142 avail_start = usable_segs[0].start; 142 avail_start = usable_segs[0].start;
143 avail_end = usable_segs[i - 1].end; 143 avail_end = usable_segs[i - 1].end;
144 144
145 virtual_avail = vstart; 145 virtual_avail = vstart;
146 virtual_end = VM_MAX_KERNEL_ADDRESS; 146 virtual_end = VM_MAX_KERNEL_ADDRESS;
147 147
148 /* 148 /*

cvs diff -r1.27 -r1.27.20.1 src/sys/arch/atari/conf/MILAN.in (expand / switch to unified diff)

--- src/sys/arch/atari/conf/MILAN.in 2014/07/05 09:24:23 1.27
+++ src/sys/arch/atari/conf/MILAN.in 2018/03/13 13:41:13 1.27.20.1
@@ -1,15 +1,15 @@ @@ -1,15 +1,15 @@
1# 1#
2# $NetBSD: MILAN.in,v 1.27 2014/07/05 09:24:23 tsutsui Exp $ 2# $NetBSD: MILAN.in,v 1.27.20.1 2018/03/13 13:41:13 martin Exp $
3# 3#
4# Milan 4# Milan
5# 5#
6# This configuration file is for a generic Milan 6# This configuration file is for a generic Milan
7# 7#
8 8
9#include "GENERIC.in" 9#include "GENERIC.in"
10 10
11# 11#
12# For the moment, the MILAN will be the only one to use wscons, so define 12# For the moment, the MILAN will be the only one to use wscons, so define
13# the wscons options here too for the moment. 13# the wscons options here too for the moment.
14# wscons options 14# wscons options
15# 15#
@@ -67,40 +67,41 @@ fdisa0 at fdcisa0 drive 0 @@ -67,40 +67,41 @@ fdisa0 at fdcisa0 drive 0
67# the MILAN-ISAIDE version. 67# the MILAN-ISAIDE version.
68# - If _all_ of your disks are byteswapped, use the MILAN-PCIIDE version 68# - If _all_ of your disks are byteswapped, use the MILAN-PCIIDE version
69# The is no way to mix things! 69# The is no way to mix things!
70# 70#
71 71
72#if defined(MILAN_ISAIDE) 72#if defined(MILAN_ISAIDE)
73# wdc on ISA with flags = WDC_OPTIONS_ATA_NOSTREAM! 73# wdc on ISA with flags = WDC_OPTIONS_ATA_NOSTREAM!
74wdc0 at isa? port 0x1f0 irq 14 flags 0x04 # 1st IDE controller 74wdc0 at isa? port 0x1f0 irq 14 flags 0x04 # 1st IDE controller
75wdc1 at isa? port 0x170 irq 15 flags 0x04 # 2nd IDE controller 75wdc1 at isa? port 0x170 irq 15 flags 0x04 # 2nd IDE controller
76#endif /* MILAN_ISAIDE */ 76#endif /* MILAN_ISAIDE */
77 77
78#if defined(MILAN_PCIIDE) 78#if defined(MILAN_PCIIDE)
79pciide* at pci? dev ? function ? flags 0x0000 # GENERIC pciide driver 79pciide* at pci? dev ? function ? flags 0x0000 # GENERIC pciide driver
80acardide* at pci? dev ? function ? # Acard IDE controllers 80#acardide* at pci? dev ? function ? # Acard IDE controllers
81aceride* at pci? dev ? function ? # Acer Lab IDE controllers 81#aceride* at pci? dev ? function ? # Acer Lab IDE controllers
82artsata* at pci? dev ? function ? # Intel i31244 SATA controller 82#artsata* at pci? dev ? function ? # Intel i31244 SATA controller
83cmdide* at pci? dev ? function ? # CMD tech IDE controllers 83#cmdide* at pci? dev ? function ? # CMD tech IDE controllers
84cypide* at pci? dev ? function ? # Cypress IDE controllers 84#cypide* at pci? dev ? function ? # Cypress IDE controllers
85hptide* at pci? dev ? function ? # Triones/HighPoint IDE controllers 85#hptide* at pci? dev ? function ? # Triones/HighPoint IDE controllers
86optiide* at pci? dev ? function ? # Opti IDE controllers 86#optiide* at pci? dev ? function ? # Opti IDE controllers
87pdcide* at pci? dev ? function ? # Promise IDE controllers 87#pdcide* at pci? dev ? function ? # Promise IDE controllers
88pdcsata* at pci? dev ? function ? # Promise SATA150 controllers 88#pdcsata* at pci? dev ? function ? # Promise SATA150 controllers
89satalink* at pci? dev ? function ? # SiI SATALink controllers 89piixide* at pci? dev ? function ? # Intel IDE controllers
90siside* at pci? dev ? function ? # SiS IDE controllers 90#satalink* at pci? dev ? function ? # SiI SATALink controllers
91slide* at pci? dev ? function ? # Symphony Labs IDE controllers 91#siside* at pci? dev ? function ? # SiS IDE controllers
92viaide* at pci? dev ? function ? # VIA/AMD/Nvidia IDE controllers 92#slide* at pci? dev ? function ? # Symphony Labs IDE controllers
93#endif /* MILAN_ISAIDE */ 93#viaide* at pci? dev ? function ? # VIA/AMD/Nvidia IDE controllers
 94#endif /* MILAN_PCIIDE */
94 95
95atabus* at ata? channel ? 96atabus* at ata? channel ?
96 97
97# 98#
98# The Milan uses wscons 99# The Milan uses wscons
99# 100#
100vga0 at pci? dev ? function ? # a PCI VGA card 101vga0 at pci? dev ? function ? # a PCI VGA card
101wsdisplay* at vga? console ? # as a wscons console 102wsdisplay* at vga? console ? # as a wscons console
102pckbc0 at isa? # PC keyboard controller 103pckbc0 at isa? # PC keyboard controller
103pckbd* at pckbc? # PC keyboard 104pckbd* at pckbc? # PC keyboard
104wskbd* at pckbd? console ? # wscons keyboard 105wskbd* at pckbd? console ? # wscons keyboard
105 106
106# ATA devices 107# ATA devices

cvs diff -r1.20 -r1.20.10.1 src/sys/arch/atari/dev/nvram.c (expand / switch to unified diff)

--- src/sys/arch/atari/dev/nvram.c 2015/03/06 12:41:05 1.20
+++ src/sys/arch/atari/dev/nvram.c 2018/03/13 13:41:13 1.20.10.1
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: nvram.c,v 1.20 2015/03/06 12:41:05 christos Exp $ */ 1/* $NetBSD: nvram.c,v 1.20.10.1 2018/03/13 13:41:13 martin Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 1995 Leo Weppelman. 4 * Copyright (c) 1995 Leo Weppelman.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -20,27 +20,27 @@ @@ -20,27 +20,27 @@
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */ 26 */
27 27
28/* 28/*
29 * Nvram driver 29 * Nvram driver
30 */ 30 */
31 31
32#include <sys/cdefs.h> 32#include <sys/cdefs.h>
33__KERNEL_RCSID(0, "$NetBSD: nvram.c,v 1.20 2015/03/06 12:41:05 christos Exp $"); 33__KERNEL_RCSID(0, "$NetBSD: nvram.c,v 1.20.10.1 2018/03/13 13:41:13 martin Exp $");
34 34
35#include <sys/param.h> 35#include <sys/param.h>
36#include <sys/conf.h> 36#include <sys/conf.h>
37#include <sys/kernel.h> 37#include <sys/kernel.h>
38#include <sys/proc.h> 38#include <sys/proc.h>
39#include <sys/systm.h> 39#include <sys/systm.h>
40#include <sys/device.h> 40#include <sys/device.h>
41#include <sys/buf.h> 41#include <sys/buf.h>
42#include <sys/uio.h> 42#include <sys/uio.h>
43 43
44#include <machine/iomap.h> 44#include <machine/iomap.h>
45#include <machine/cpu.h> 45#include <machine/cpu.h>
46 46
@@ -82,31 +82,35 @@ nvr_match(device_t parent, cfdata_t cf,  @@ -82,31 +82,35 @@ nvr_match(device_t parent, cfdata_t cf,
82 return (0); 82 return (0);
83} 83}
84 84
85/*ARGSUSED*/ 85/*ARGSUSED*/
86static void 86static void
87nvr_attach(device_t parent, device_t self, void *aux) 87nvr_attach(device_t parent, device_t self, void *aux)
88{ 88{
89 struct nvr_softc *sc; 89 struct nvr_softc *sc;
90 int nreg; 90 int nreg;
91  91
92 /* 92 /*
93 * Check the validity of the NVram contents 93 * Check the validity of the NVram contents
94 */ 94 */
95 if (!nvram_csum_valid(nvram_csum())) { 95 /* XXX: Milan's firmware seems to use different check method */
96 printf(": Invalid checksum - re-initialized"); 96 if ((machineid & ATARI_MILAN) == 0) {
97 for (nreg = MC_NVRAM_START; nreg < MC_NVRAM_CSUM; nreg++) 97 if (!nvram_csum_valid(nvram_csum())) {
98 mc146818_write(RTC, nreg, 0); 98 printf(": Invalid checksum - re-initialized");
99 nvram_set_csum(nvram_csum()); 99 for (nreg = MC_NVRAM_START; nreg < MC_NVRAM_CSUM;
 100 nreg++)
 101 mc146818_write(RTC, nreg, 0);
 102 nvram_set_csum(nvram_csum());
 103 }
100 } 104 }
101 sc = device_private(self); 105 sc = device_private(self);
102 sc->sc_dev = self; 106 sc->sc_dev = self;
103 sc->sc_flags = NVR_CONFIGURED; 107 sc->sc_flags = NVR_CONFIGURED;
104 printf("\n"); 108 printf("\n");
105} 109}
106/* 110/*
107 * End of auto config stuff.... 111 * End of auto config stuff....
108 */ 112 */
109#endif /* NNVR > 0 */ 113#endif /* NNVR > 0 */
110 114
111/* 115/*
112 * Kernel internal interface 116 * Kernel internal interface

cvs diff -r1.31 -r1.31.6.1 src/sys/arch/atari/include/vmparam.h (expand / switch to unified diff)

--- src/sys/arch/atari/include/vmparam.h 2017/02/02 21:53:54 1.31
+++ src/sys/arch/atari/include/vmparam.h 2018/03/13 13:41:14 1.31.6.1
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: vmparam.h,v 1.31 2017/02/02 21:53:54 rin Exp $ */ 1/* $NetBSD: vmparam.h,v 1.31.6.1 2018/03/13 13:41:14 martin Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 1988 University of Utah. 4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1982, 1986, 1990 The Regents of the University of California. 5 * Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
6 * All rights reserved. 6 * All rights reserved.
7 * 7 *
8 * This code is derived from software contributed to Berkeley by 8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer 9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department. 10 * Science Department.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions 13 * modification, are permitted provided that the following conditions
14 * are met: 14 * are met:
@@ -94,28 +94,30 @@ @@ -94,28 +94,30 @@
94#define VM_MIN_ADDRESS ((vaddr_t)0) 94#define VM_MIN_ADDRESS ((vaddr_t)0)
95#define VM_MAX_ADDRESS ((vaddr_t)0xFFF00000) 95#define VM_MAX_ADDRESS ((vaddr_t)0xFFF00000)
96#define VM_MAXUSER_ADDRESS ((vaddr_t)0xFFF00000) 96#define VM_MAXUSER_ADDRESS ((vaddr_t)0xFFF00000)
97#define VM_MIN_KERNEL_ADDRESS ((vaddr_t)0) 97#define VM_MIN_KERNEL_ADDRESS ((vaddr_t)0)
98#define VM_MAX_KERNEL_ADDRESS ((vaddr_t)-(NPTEPG * PAGE_SIZE)) 98#define VM_MAX_KERNEL_ADDRESS ((vaddr_t)-(NPTEPG * PAGE_SIZE))
99 99
100/* 100/*
101 * virtual sizes (bytes) for various kernel submaps 101 * virtual sizes (bytes) for various kernel submaps
102 */ 102 */
103#define VM_PHYS_SIZE (USRIOSIZE*PAGE_SIZE) 103#define VM_PHYS_SIZE (USRIOSIZE*PAGE_SIZE)
104 104
105/* 105/*
106 * Our bootloader currently passes up to 2 segments (ST and TT ram). 106 * Our bootloader currently passes up to 2 segments (ST and TT ram).
 107 * On the other hand, Milan has four SIMM slots with 2 banks
 108 * so it could have upto 8 segments.
107 */ 109 */
108#define VM_PHYSSEG_MAX (2) 110#define VM_PHYSSEG_MAX (8)
109#define VM_PHYSSEG_STRAT VM_PSTRAT_RANDOM 111#define VM_PHYSSEG_STRAT VM_PSTRAT_RANDOM
110 112
111#define VM_NFREELIST 2 113#define VM_NFREELIST 2
112#define VM_FREELIST_DEFAULT 0 114#define VM_FREELIST_DEFAULT 0
113#define VM_FREELIST_TTRAM VM_FREELIST_DEFAULT 115#define VM_FREELIST_TTRAM VM_FREELIST_DEFAULT
114#define VM_FREELIST_STRAM 1 116#define VM_FREELIST_STRAM 1
115 117
116#define __HAVE_PMAP_PHYSSEG 118#define __HAVE_PMAP_PHYSSEG
117 119
118/*  120/*
119 * pmap-specific data stored in the vm_physmem[] array. 121 * pmap-specific data stored in the vm_physmem[] array.
120 */  122 */
121struct pmap_physseg {  123struct pmap_physseg {

cvs diff -r1.40 -r1.40.30.1 src/sys/arch/atari/isa/isa_machdep.c (expand / switch to unified diff)

--- src/sys/arch/atari/isa/isa_machdep.c 2012/10/13 17:58:54 1.40
+++ src/sys/arch/atari/isa/isa_machdep.c 2018/03/13 13:41:14 1.40.30.1
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: isa_machdep.c,v 1.40 2012/10/13 17:58:54 jdc Exp $ */ 1/* $NetBSD: isa_machdep.c,v 1.40.30.1 2018/03/13 13:41:14 martin Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 1997 Leo Weppelman. All rights reserved. 4 * Copyright (c) 1997 Leo Weppelman. All rights reserved.
5 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 5 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
6 * Copyright (c) 1994 Charles M. Hannum. All rights reserved. 6 * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
7 * 7 *
8 * Redistribution and use in source and binary forms, with or without 8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions 9 * modification, are permitted provided that the following conditions
10 * are met: 10 * are met:
11 * 1. Redistributions of source code must retain the above copyright 11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer. 12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright 13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the 14 * notice, this list of conditions and the following disclaimer in the
@@ -22,27 +22,27 @@ @@ -22,27 +22,27 @@
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */ 32 */
33 33
34#include <sys/cdefs.h> 34#include <sys/cdefs.h>
35__KERNEL_RCSID(0, "$NetBSD: isa_machdep.c,v 1.40 2012/10/13 17:58:54 jdc Exp $"); 35__KERNEL_RCSID(0, "$NetBSD: isa_machdep.c,v 1.40.30.1 2018/03/13 13:41:14 martin Exp $");
36 36
37#include <sys/types.h> 37#include <sys/types.h>
38#include <sys/param.h> 38#include <sys/param.h>
39#include <sys/systm.h> 39#include <sys/systm.h>
40#include <sys/device.h> 40#include <sys/device.h>
41 41
42#define _ATARI_BUS_DMA_PRIVATE 42#define _ATARI_BUS_DMA_PRIVATE
43#include <sys/bus.h> 43#include <sys/bus.h>
44#include <dev/isa/isavar.h> 44#include <dev/isa/isavar.h>
45#include <dev/isa/isareg.h> 45#include <dev/isa/isareg.h>
46 46
47#include "pckbc.h" 47#include "pckbc.h"
48#if (NPCKBC > 0) 48#if (NPCKBC > 0)
@@ -101,54 +101,55 @@ isabusmatch(device_t parent, cfdata_t cf @@ -101,54 +101,55 @@ isabusmatch(device_t parent, cfdata_t cf
101 * The Hades and Milan have only one pci bus 101 * The Hades and Milan have only one pci bus
102 */ 102 */
103 if (nmatched) 103 if (nmatched)
104 return 0; 104 return 0;
105 nmatched++; 105 nmatched++;
106 return 1; 106 return 1;
107 } 107 }
108 return 0; 108 return 0;
109} 109}
110 110
111void 111void
112isabusattach(device_t parent, device_t self, void *aux) 112isabusattach(device_t parent, device_t self, void *aux)
113{ 113{
114 struct isabus_softc *sc = device_private(self); 114 struct isabus_softc *sc;
115 struct isabus_attach_args iba; 115 struct isabus_attach_args iba;
116 extern struct atari_bus_dma_tag isa_bus_dma_tag; 116 extern struct atari_bus_dma_tag isa_bus_dma_tag;
117 extern void isa_bus_init(void); 117 extern void isa_bus_init(void);
118 118
119 sc->sc_dev = self; 
120 
121 iba.iba_dmat = &isa_bus_dma_tag; 119 iba.iba_dmat = &isa_bus_dma_tag;
122 iba.iba_iot = leb_alloc_bus_space_tag(&bs_storage[0]); 120 iba.iba_iot = leb_alloc_bus_space_tag(&bs_storage[0]);
123 iba.iba_memt = leb_alloc_bus_space_tag(&bs_storage[1]); 121 iba.iba_memt = leb_alloc_bus_space_tag(&bs_storage[1]);
124 iba.iba_ic = &sc->sc_chipset; 
125 if ((iba.iba_iot == NULL) || (iba.iba_memt == NULL)) { 122 if ((iba.iba_iot == NULL) || (iba.iba_memt == NULL)) {
126 printf("leb_alloc_bus_space_tag failed!\n"); 123 printf("leb_alloc_bus_space_tag failed!\n");
127 return; 124 return;
128 } 125 }
129 iba.iba_iot->base = ISA_IOSTART; 126 iba.iba_iot->base = ISA_IOSTART;
130 iba.iba_memt->base = ISA_MEMSTART; 127 iba.iba_memt->base = ISA_MEMSTART;
131 128
132 if (machineid & ATARI_HADES) 129 if (machineid & ATARI_HADES)
133 MFP->mf_aer |= (IO_ISA1|IO_ISA2); /* ISA interrupts: LOW->HIGH */ 130 MFP->mf_aer |= (IO_ISA1|IO_ISA2); /* ISA interrupts: LOW->HIGH */
134 isa_bus_init(); 131 isa_bus_init();
135 if (self == NULL) { /* Early init */ 132 if (self == NULL) { /* Early init */
136#if (NPCKBC > 0) 133#if (NPCKBC > 0)
137 pckbc_cnattach(iba.iba_iot, IO_KBD, KBCMDP, PCKBC_KBD_SLOT, 0); 134 pckbc_cnattach(iba.iba_iot, IO_KBD, KBCMDP, PCKBC_KBD_SLOT, 0);
138#endif 135#endif
139 return; 136 return;
140 } 137 }
141 138
 139 sc = device_private(self);
 140 sc->sc_dev = self;
 141 iba.iba_ic = &sc->sc_chipset;
 142
142 printf("\n"); 143 printf("\n");
143 config_found_ia(self, "isabus", &iba, atariisabusprint); 144 config_found_ia(self, "isabus", &iba, atariisabusprint);
144} 145}
145 146
146int 147int
147atariisabusprint(void *aux, const char *name) 148atariisabusprint(void *aux, const char *name)
148{ 149{
149 150
150 if (name == NULL) 151 if (name == NULL)
151 return UNCONF; 152 return UNCONF;
152 return QUIET; 153 return QUIET;
153} 154}
154 155

cvs diff -r1.14 -r1.14.56.1 src/sys/arch/atari/isa/isa_milan.c (expand / switch to unified diff)

--- src/sys/arch/atari/isa/isa_milan.c 2009/03/18 10:22:25 1.14
+++ src/sys/arch/atari/isa/isa_milan.c 2018/03/13 13:41:14 1.14.56.1
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: isa_milan.c,v 1.14 2009/03/18 10:22:25 cegger Exp $ */ 1/* $NetBSD: isa_milan.c,v 1.14.56.1 2018/03/13 13:41:14 martin Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Leo Weppelman. 8 * by Leo Weppelman.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -20,27 +20,27 @@ @@ -20,27 +20,27 @@
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32#include <sys/cdefs.h> 32#include <sys/cdefs.h>
33__KERNEL_RCSID(0, "$NetBSD: isa_milan.c,v 1.14 2009/03/18 10:22:25 cegger Exp $"); 33__KERNEL_RCSID(0, "$NetBSD: isa_milan.c,v 1.14.56.1 2018/03/13 13:41:14 martin Exp $");
34 34
35#include <sys/types.h> 35#include <sys/types.h>
36#include <sys/param.h> 36#include <sys/param.h>
37#include <sys/systm.h> 37#include <sys/systm.h>
38#include <sys/device.h> 38#include <sys/device.h>
39 39
40#include <dev/isa/isavar.h> 40#include <dev/isa/isavar.h>
41#include <dev/isa/isareg.h> 41#include <dev/isa/isareg.h>
42 42
43#include <machine/iomap.h> 43#include <machine/iomap.h>
44 44
45void isa_bus_init(void); 45void isa_bus_init(void);
46 46
@@ -112,66 +112,66 @@ new_imask(void) @@ -112,66 +112,66 @@ new_imask(void)
112 WICU(AD_8259_SLAVE+1 , (imask_enable >> 8) & 0xff); 112 WICU(AD_8259_SLAVE+1 , (imask_enable >> 8) & 0xff);
113} 113}
114 114
115static void 115static void
116isa_callback(int vector) 116isa_callback(int vector)
117{ 117{
118 isa_intr_info_t *iinfo_p; 118 isa_intr_info_t *iinfo_p;
119 int s; 119 int s;
120 120
121 iinfo_p = &milan_isa_iinfo[vector]; 121 iinfo_p = &milan_isa_iinfo[vector];
122 122
123 s = splx(iinfo_p->ipl); 123 s = splx(iinfo_p->ipl);
124 (void) (iinfo_p->ifunc)(iinfo_p->iarg); 124 (void) (iinfo_p->ifunc)(iinfo_p->iarg);
125 if (vector > 7) 125 if (vector > 7) {
126 WICU(AD_8259_SLAVE, 0x60 | (vector & 7)); 126 WICU(AD_8259_SLAVE, 0x60 | (vector & 7));
127 else WICU(AD_8259_MASTER, 0x60 | (vector & 7)); 127 vector = IRQ_SLAVE;
 128 }
 129 WICU(AD_8259_MASTER, 0x60 | (vector & 7));
128 splx(s); 130 splx(s);
129} 131}
130 132
131void milan_isa_intr(int, int); 133void milan_isa_intr(int, int);
132void 134void
133milan_isa_intr(int vector, int sr) 135milan_isa_intr(int vector, int sr)
134{ 136{
135 isa_intr_info_t *iinfo_p; 137 isa_intr_info_t *iinfo_p;
136 int s; 138 int s;
137 139
138 if (vector >= MILAN_MAX_ISA_INTS) { 140 if (vector >= MILAN_MAX_ISA_INTS) {
139 printf("milan_isa_intr: Bogus vector %d\n", vector); 141 printf("milan_isa_intr: Bogus vector %d\n", vector);
140 return; 142 return;
141 } 143 }
142 144
143 /* Ack cascade 0x60 == Specific EOI */ 
144 if (vector > 7) 
145 WICU(AD_8259_MASTER, 0x60|IRQ_SLAVE); 
146 
147 iinfo_p = &milan_isa_iinfo[vector]; 145 iinfo_p = &milan_isa_iinfo[vector];
148 if (iinfo_p->ifunc == NULL) { 146 if (iinfo_p->ifunc == NULL) {
149 printf("milan_isa_intr: Stray interrupt: %d (mask:%04x)\n", 147 printf("milan_isa_intr: Stray interrupt: %d (mask:%04x)\n",
150 vector, imask_enable); 148 vector, imask_enable);
151 return; 149 return;
152 } 150 }
153 if ((sr & PSL_IPL) >= (iinfo_p->ipl & PSL_IPL)) { 151 if ((sr & PSL_IPL) >= (iinfo_p->ipl & PSL_IPL)) {
154 /* 152 /*
155 * We're running at a too high priority now. 153 * We're running at a too high priority now.
156 */ 154 */
157 add_sicallback((si_farg)isa_callback, (void*)vector, 0); 155 add_sicallback((si_farg)isa_callback, (void*)vector, 0);
158 } 156 }
159 else { 157 else {
160 s = splx(iinfo_p->ipl); 158 s = splx(iinfo_p->ipl);
161 (void) (iinfo_p->ifunc)(iinfo_p->iarg); 159 (void) (iinfo_p->ifunc)(iinfo_p->iarg);
162 if (vector > 7) 160 if (vector > 7) {
163 WICU(AD_8259_SLAVE, 0x60 | (vector & 7)); 161 WICU(AD_8259_SLAVE, 0x60 | (vector & 7));
164 else WICU(AD_8259_MASTER, 0x60 | (vector & 7)); 162 vector = IRQ_SLAVE;
 163 }
 164 WICU(AD_8259_MASTER, 0x60 | (vector & 7));
165 splx(s); 165 splx(s);
166 } 166 }
167} 167}
168 168
169/* 169/*
170 * Try to allocate a free interrupt... On the Milan, we have available: 170 * Try to allocate a free interrupt... On the Milan, we have available:
171 * 5, 9, 10, 11, 13. Or in a bitmask: 0x1720. 171 * 5, 9, 10, 11, 13. Or in a bitmask: 0x1720.
172 */ 172 */
173#define MILAN_AVAIL_ISA_INTS 0x1720 173#define MILAN_AVAIL_ISA_INTS 0x1720
174 174
175int 175int
176isa_intr_alloc(isa_chipset_tag_t ic, int mask, int type, int *irq) 176isa_intr_alloc(isa_chipset_tag_t ic, int mask, int type, int *irq)
177{ 177{
@@ -199,27 +199,27 @@ isa_intr_establish(isa_chipset_tag_t ic, @@ -199,27 +199,27 @@ isa_intr_establish(isa_chipset_tag_t ic,
199{ 199{
200 isa_intr_info_t *iinfo_p; 200 isa_intr_info_t *iinfo_p;
201 201
202 iinfo_p = &milan_isa_iinfo[irq]; 202 iinfo_p = &milan_isa_iinfo[irq];
203 203
204 if (iinfo_p->ifunc != NULL) { 204 if (iinfo_p->ifunc != NULL) {
205 printf("isa_intr_establish: interrupt %d was already " 205 printf("isa_intr_establish: interrupt %d was already "
206 "established\n", irq); 206 "established\n", irq);
207 return NULL; 207 return NULL;
208 } 208 }
209 209
210 iinfo_p->slot = 0; /* Unused on Milan */ 210 iinfo_p->slot = 0; /* Unused on Milan */
211 iinfo_p->ihand = NULL; /* Unused on Milan */ 211 iinfo_p->ihand = NULL; /* Unused on Milan */
212 iinfo_p->ipl = level; 212 iinfo_p->ipl = ipl2psl_table[level];
213 iinfo_p->ifunc = ih_fun; 213 iinfo_p->ifunc = ih_fun;
214 iinfo_p->iarg = ih_arg; 214 iinfo_p->iarg = ih_arg;
215 215
216 new_imask(); 216 new_imask();
217 return(iinfo_p); 217 return(iinfo_p);
218} 218}
219 219
220void 220void
221isa_intr_disestablish(isa_chipset_tag_t ic, void *handler) 221isa_intr_disestablish(isa_chipset_tag_t ic, void *handler)
222{ 222{
223 isa_intr_info_t *iinfo_p = (isa_intr_info_t *)handler; 223 isa_intr_info_t *iinfo_p = (isa_intr_info_t *)handler;
224 224
225 if (iinfo_p->ifunc == NULL) 225 if (iinfo_p->ifunc == NULL)

cvs diff -r1.54 -r1.54.22.1 src/sys/arch/atari/pci/pci_machdep.c (expand / switch to unified diff)

--- src/sys/arch/atari/pci/pci_machdep.c 2014/03/29 19:28:26 1.54
+++ src/sys/arch/atari/pci/pci_machdep.c 2018/03/13 13:41:14 1.54.22.1
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: pci_machdep.c,v 1.54 2014/03/29 19:28:26 christos Exp $ */ 1/* $NetBSD: pci_machdep.c,v 1.54.22.1 2018/03/13 13:41:14 martin Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 1996 Leo Weppelman. All rights reserved. 4 * Copyright (c) 1996 Leo Weppelman. All rights reserved.
5 * Copyright (c) 1996, 1997 Christopher G. Demetriou. All rights reserved. 5 * Copyright (c) 1996, 1997 Christopher G. Demetriou. All rights reserved.
6 * Copyright (c) 1994 Charles M. Hannum. All rights reserved. 6 * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
7 * 7 *
8 * Redistribution and use in source and binary forms, with or without 8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions 9 * modification, are permitted provided that the following conditions
10 * are met: 10 * are met:
11 * 1. Redistributions of source code must retain the above copyright 11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer. 12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright 13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the 14 * notice, this list of conditions and the following disclaimer in the
@@ -22,43 +22,44 @@ @@ -22,43 +22,44 @@
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */ 32 */
33 33
34#include <sys/cdefs.h> 34#include <sys/cdefs.h>
35__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.54 2014/03/29 19:28:26 christos Exp $"); 35__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.54.22.1 2018/03/13 13:41:14 martin Exp $");
36 36
37#include "opt_mbtype.h" 37#include "opt_mbtype.h"
38 38
39#include <sys/types.h> 39#include <sys/types.h>
40#include <sys/param.h> 40#include <sys/param.h>
41#include <sys/time.h> 41#include <sys/time.h>
42#include <sys/systm.h> 42#include <sys/systm.h>
43#include <sys/errno.h> 43#include <sys/errno.h>
44#include <sys/device.h> 44#include <sys/device.h>
45#include <sys/malloc.h> 45#include <sys/malloc.h>
46 46
47#define _ATARI_BUS_DMA_PRIVATE 47#define _ATARI_BUS_DMA_PRIVATE
48#include <sys/bus.h> 48#include <sys/bus.h>
49 49
50#include <dev/pci/pcivar.h> 50#include <dev/pci/pcivar.h>
51#include <dev/pci/pcireg.h> 51#include <dev/pci/pcireg.h>
 52#include <dev/pci/pcidevs.h>
52 53
53#include <uvm/uvm_extern.h> 54#include <uvm/uvm_extern.h>
54 55
55#include <machine/cpu.h> 56#include <machine/cpu.h>
56#include <machine/iomap.h> 57#include <machine/iomap.h>
57#include <machine/mfp.h> 58#include <machine/mfp.h>
58 59
59#include <atari/atari/device.h> 60#include <atari/atari/device.h>
60#include <atari/pci/pci_vga.h> 61#include <atari/pci/pci_vga.h>
61 62
62/* 63/*
63 * Sizes of pci memory and I/O area. 64 * Sizes of pci memory and I/O area.
64 */ 65 */
@@ -439,26 +440,44 @@ enable_pci_devices(void) @@ -439,26 +440,44 @@ enable_pci_devices(void)
439#if defined(_ATARIHW_) 440#if defined(_ATARIHW_)
440 /* 441 /*
441 * Both interrupt pin & line are set to the device (== slot) 442 * Both interrupt pin & line are set to the device (== slot)
442 * number. This makes sense on the atari Hades because the 443 * number. This makes sense on the atari Hades because the
443 * individual slots are hard-wired to a specific MFP-pin. 444 * individual slots are hard-wired to a specific MFP-pin.
444 */ 445 */
445 csr = (DEV2SLOT(dev) << PCI_INTERRUPT_PIN_SHIFT); 446 csr = (DEV2SLOT(dev) << PCI_INTERRUPT_PIN_SHIFT);
446 csr |= (DEV2SLOT(dev) << PCI_INTERRUPT_LINE_SHIFT); 447 csr |= (DEV2SLOT(dev) << PCI_INTERRUPT_LINE_SHIFT);
447 pci_conf_write(pc, tag, PCI_INTERRUPT_REG, csr); 448 pci_conf_write(pc, tag, PCI_INTERRUPT_REG, csr);
448#else 449#else
449 /* 450 /*
450 * On the Milan, we accept the BIOS's choice. 451 * On the Milan, we accept the BIOS's choice.
451 */ 452 */
 453 /* ..except the secondary IDE interrupt that the BIOS doesn't setup. */
 454#define PIIX_PCIB_MBIRQ0 0x70
 455 if ((PCI_VENDOR(id) == PCI_VENDOR_INTEL) &&
 456 (PCI_PRODUCT(id) == PCI_PRODUCT_INTEL_82371FB_ISA)) {
 457 /*
 458 * Set Interrupt Routing for MBIRQ0 to IRQ15.
 459 * Note Milan's ROM bootloader v1.2 and v1.4 incorrectly
 460 * set MBIRQ0 to IRQ14 (not 15) and unused MBIRQ1 to IRQ 15,
 461 * so explicitly disable MBIRQ1.
 462 */
 463 csr = pci_conf_read(pc, tag, PIIX_PCIB_MBIRQ0);
 464 csr &= ~0x000ffff;
 465 csr |= 0x000800f; /* MBIRQ1: disable, MBIRQ0: IRQ15 */
 466 pci_conf_write(pc, tag, PIIX_PCIB_MBIRQ0, csr);
 467#ifdef DEBUG_PCI_MACHDEP
 468 printf("\npcib0: enable and route MBIRQ0 to irq 15\n");
 469#endif
 470 }
452#endif 471#endif
453 } 472 }
454 473
455 /* 474 /*
456 * second step: calculate the memory and I/O addresses beginning from 475 * second step: calculate the memory and I/O addresses beginning from
457 * PCI_MEM_START and PCI_IO_START. Care about already mapped areas. 476 * PCI_MEM_START and PCI_IO_START. Care about already mapped areas.
458 * 477 *
459 * begin with memory list 478 * begin with memory list
460 */ 479 */
461 480
462 address = PCI_MEM_START; 481 address = PCI_MEM_START;
463 sizecnt = 0; 482 sizecnt = 0;
464 membase_1m = 0; 483 membase_1m = 0;

cvs diff -r1.14 -r1.14.10.1 src/sys/arch/atari/pci/pci_milan.c (expand / switch to unified diff)

--- src/sys/arch/atari/pci/pci_milan.c 2015/10/02 05:22:50 1.14
+++ src/sys/arch/atari/pci/pci_milan.c 2018/03/13 13:41:14 1.14.10.1
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: pci_milan.c,v 1.14 2015/10/02 05:22:50 msaitoh Exp $ */ 1/* $NetBSD: pci_milan.c,v 1.14.10.1 2018/03/13 13:41:14 martin Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Leo Weppelman. 8 * by Leo Weppelman.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -20,27 +20,27 @@ @@ -20,27 +20,27 @@
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32#include <sys/cdefs.h> 32#include <sys/cdefs.h>
33__KERNEL_RCSID(0, "$NetBSD: pci_milan.c,v 1.14 2015/10/02 05:22:50 msaitoh Exp $"); 33__KERNEL_RCSID(0, "$NetBSD: pci_milan.c,v 1.14.10.1 2018/03/13 13:41:14 martin Exp $");
34 34
35#include <sys/types.h> 35#include <sys/types.h>
36#include <sys/param.h> 36#include <sys/param.h>
37#include <sys/systm.h> 37#include <sys/systm.h>
38#include <sys/device.h> 38#include <sys/device.h>
39 39
40#include <dev/pci/pcivar.h> 40#include <dev/pci/pcivar.h>
41#include <dev/pci/pcireg.h> 41#include <dev/pci/pcireg.h>
42 42
43#include <dev/isa/isavar.h> /* isa_intr_{dis}establish */ 43#include <dev/isa/isavar.h> /* isa_intr_{dis}establish */
44#include <dev/isa/isareg.h> /* isa_intr_{dis}establish */ 44#include <dev/isa/isareg.h> /* isa_intr_{dis}establish */
45 45
46#include <sys/bswap.h> 46#include <sys/bswap.h>
@@ -110,39 +110,61 @@ pci_intr_establish(pci_chipset_tag_t pc, @@ -110,39 +110,61 @@ pci_intr_establish(pci_chipset_tag_t pc,
110 if (ih == 0 || ih >= 16 || ih == 2) 110 if (ih == 0 || ih >= 16 || ih == 2)
111 panic("pci_intr_establish: bogus handle 0x%x", ih); 111 panic("pci_intr_establish: bogus handle 0x%x", ih);
112 return isa_intr_establish(NULL, ih, IST_LEVEL, level, ih_fun, ih_arg); 112 return isa_intr_establish(NULL, ih, IST_LEVEL, level, ih_fun, ih_arg);
113} 113}
114 114
115void 115void
116pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie) 116pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
117{ 117{
118 isa_intr_disestablish(NULL, cookie); 118 isa_intr_disestablish(NULL, cookie);
119} 119}
120 120
121/* 121/*
122 * VGA related stuff... 122 * VGA related stuff...
123 * XXX: Currently, you can only boot the Milan through loadbsd.ttp, hence the 123 *
124 * text mode ;-) 
125 * It looks like the Milan BIOS is initializing the VGA card in a reasonably 124 * It looks like the Milan BIOS is initializing the VGA card in a reasonably
126 * standard text mode. However, the screen mode is 640*480 instead of 640*400. 125 * standard text mode. However, the screen mode is 640*480 instead of 640*400.
127 * Since wscons does not handle the right by default, the card is reprogrammed 126 * Since wscons does not handle the right by default, the card is reprogrammed
128 * to 640*400 using only 'standard' VGA registers (I hope!). So this ought to 127 * to 640*400 using only 'standard' VGA registers (I hope!). So this ought to
129 * work on cards other than the S3Trio card I have tested it on. 128 * work on cards other than the S3Trio card I have tested it on.
130 */ 129 */
131static u_char crt_tab[] = { 130static const uint8_t crt_tab[] = {
132 0x60, 0x53, 0x4f, 0x14, 0x56, 0x05, 0xc1, 0x1f, 131 /* taken from vga_crtc[] in sys/dev/ic/vga_subr.c */
133 0x00, 0x4f, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00, 132 0x5f, /* 00: horizontal total */
134 0x98, 0x3d, 0x8f, 0x28, 0x0f, 0x8f, 0xc1, 0xc3, 133 0x4f, /* 01: horizontal display-enable end */
135 0xff }; 134 0x50, /* 02: start horizontal blanking */
 135 0x82, /* 03: display skew control / end horizontal blanking */
 136 0x55, /* 04: start horizontal retrace pulse */
 137 0x81, /* 05: horizontal retrace delay / end horizontal retrace */
 138 0xbf, /* 06: vertical total */
 139 0x1f, /* 07: overflow register */
 140 0x00, /* 08: preset row scan */
 141 0x4f, /* 09: overflow / maximum scan line */
 142 0x0d, /* 0A: cursor off / cursor start */
 143 0x0e, /* 0B: cursor skew / cursor end */
 144 0x00, /* 0C: start regenerative buffer address high */
 145 0x00, /* 0D: start regenerative buffer address low */
 146 0x00, /* 0E: cursor location high */
 147 0x00, /* 0F: cursor location low */
 148 0x9c, /* 10: vertical retrace start */
 149 0x8e, /* 11: vertical interrupt / vertical retrace end */
 150 0x8f, /* 12: vertical display enable end */
 151 0x28, /* 13: logical line width */
 152 0x00, /* 14: underline location */
 153 0x96, /* 15: start vertical blanking */
 154 0xb9, /* 16: end vertical blanking */
 155 0xa3, /* 17: CRT mode control */
 156 0xff /* 18: line compare */
 157};
136 158
137/* 159/*
138 * XXX: Why are we repeating this everywhere! (Leo) 160 * XXX: Why are we repeating this everywhere! (Leo)
139 */ 161 */
140#define PCI_LINMEMBASE 0x0e000000 162#define PCI_LINMEMBASE 0x0e000000
141 163
142void 164void
143milan_vga_init(pci_chipset_tag_t pc, pcitag_t tag, int id, volatile u_char *ba, u_char *fb) 165milan_vga_init(pci_chipset_tag_t pc, pcitag_t tag, int id, volatile u_char *ba, u_char *fb)
144{ 166{
145 int i, csr; 167 int i, csr;
146 168
147 /* Turn on the card */ 169 /* Turn on the card */
148 pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE); 170 pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE);

cvs diff -r1.3 -r1.3.188.1 src/sys/arch/atari/stand/xxboot/ahdi-xxboot/milan/Makefile (expand / switch to unified diff)

--- src/sys/arch/atari/stand/xxboot/ahdi-xxboot/milan/Makefile 2003/06/28 09:09:53 1.3
+++ src/sys/arch/atari/stand/xxboot/ahdi-xxboot/milan/Makefile 2018/03/13 13:41:13 1.3.188.1
@@ -1,5 +1,6 @@ @@ -1,5 +1,6 @@
1# $NetBSD: Makefile,v 1.3 2003/06/28 09:09:53 he Exp $ 1# $NetBSD: Makefile,v 1.3.188.1 2018/03/13 13:41:13 martin Exp $
2 2
3BTYPE=MILAN 3BTYPE=MILAN
 4LINKS= ${BINDIR}/sdb00t.ahdi ${BINDIR}/wdb00t.ahdi
4 5
5.include <../Makefile.xxb> 6.include <../Makefile.xxb>

cvs diff -r1.3 -r1.3.188.1 src/sys/arch/atari/stand/xxboot/sdboot/milan/Makefile (expand / switch to unified diff)

--- src/sys/arch/atari/stand/xxboot/sdboot/milan/Makefile 2003/06/28 09:09:54 1.3
+++ src/sys/arch/atari/stand/xxboot/sdboot/milan/Makefile 2018/03/13 13:41:13 1.3.188.1
@@ -1,5 +1,6 @@ @@ -1,5 +1,6 @@
1# $NetBSD: Makefile,v 1.3 2003/06/28 09:09:54 he Exp $ 1# $NetBSD: Makefile,v 1.3.188.1 2018/03/13 13:41:13 martin Exp $
2 2
3BTYPE=MILAN 3BTYPE=MILAN
 4LINKS= ${BINDIR}/sdboot ${BINDIR}/wdboot
4 5
5.include <../Makefile.sdboot> 6.include <../Makefile.sdboot>

cvs diff -r1.110 -r1.110.10.1 src/sys/dev/isa/fd.c (expand / switch to unified diff)

--- src/sys/dev/isa/fd.c 2015/12/08 20:36:15 1.110
+++ src/sys/dev/isa/fd.c 2018/03/13 13:41:13 1.110.10.1
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: fd.c,v 1.110 2015/12/08 20:36:15 christos Exp $ */ 1/* $NetBSD: fd.c,v 1.110.10.1 2018/03/13 13:41:13 martin Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 1998, 2003, 2008 The NetBSD Foundation, Inc. 4 * Copyright (c) 1998, 2003, 2008 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum. 8 * by Charles M. Hannum.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -71,27 +71,27 @@ @@ -71,27 +71,27 @@
71 * use ..." clause: 71 * use ..." clause:
72 * 72 *
73 * Copyright (c) 1993, 1994 by 73 * Copyright (c) 1993, 1994 by
74 * jc@irbs.UUCP (John Capo) 74 * jc@irbs.UUCP (John Capo)
75 * vak@zebub.msk.su (Serge Vakulenko) 75 * vak@zebub.msk.su (Serge Vakulenko)
76 * ache@astral.msk.su (Andrew A. Chernov) 76 * ache@astral.msk.su (Andrew A. Chernov)
77 * 77 *
78 * Copyright (c) 1993, 1994, 1995 by 78 * Copyright (c) 1993, 1994, 1995 by
79 * joerg_wunsch@uriah.sax.de (Joerg Wunsch) 79 * joerg_wunsch@uriah.sax.de (Joerg Wunsch)
80 * dufault@hda.com (Peter Dufault) 80 * dufault@hda.com (Peter Dufault)
81 */ 81 */
82 82
83#include <sys/cdefs.h> 83#include <sys/cdefs.h>
84__KERNEL_RCSID(0, "$NetBSD: fd.c,v 1.110 2015/12/08 20:36:15 christos Exp $"); 84__KERNEL_RCSID(0, "$NetBSD: fd.c,v 1.110.10.1 2018/03/13 13:41:13 martin Exp $");
85 85
86#include "opt_ddb.h" 86#include "opt_ddb.h"
87 87
88/* 88/*
89 * XXX This driver should be properly MI'd some day, but this allows us 89 * XXX This driver should be properly MI'd some day, but this allows us
90 * XXX to eliminate a lot of code duplication for now. 90 * XXX to eliminate a lot of code duplication for now.
91 */ 91 */
92#if !defined(alpha) && !defined(algor) && !defined(atari) && \ 92#if !defined(alpha) && !defined(algor) && !defined(atari) && \
93 !defined(bebox) && !defined(evbmips) && !defined(i386) && \ 93 !defined(bebox) && !defined(evbmips) && !defined(i386) && \
94 !defined(prep) && !defined(sandpoint) && !defined(x86_64) && \ 94 !defined(prep) && !defined(sandpoint) && !defined(x86_64) && \
95 !defined(mvmeppc) && !defined(ofppc) 95 !defined(mvmeppc) && !defined(ofppc)
96#error platform not supported by this driver, yet 96#error platform not supported by this driver, yet
97#endif 97#endif
@@ -450,34 +450,36 @@ fdcfinishattach(device_t self) @@ -450,34 +450,36 @@ fdcfinishattach(device_t self)
450 for (fa.fa_drive = 0; fa.fa_drive < 4; fa.fa_drive++) { 450 for (fa.fa_drive = 0; fa.fa_drive < 4; fa.fa_drive++) {
451 if (fdc->sc_known) { 451 if (fdc->sc_known) {
452 if (fdc->sc_present & (1 << fa.fa_drive)) { 452 if (fdc->sc_present & (1 << fa.fa_drive)) {
453 fa.fa_deftype = fdc->sc_knownfds[fa.fa_drive]; 453 fa.fa_deftype = fdc->sc_knownfds[fa.fa_drive];
454 config_found(fdc->sc_dev, (void *)&fa, 454 config_found(fdc->sc_dev, (void *)&fa,
455 fdprint); 455 fdprint);
456 } 456 }
457 } else { 457 } else {
458#if defined(atari) 458#if defined(atari)
459 /* 459 /*
460 * Atari has a different ordening, defaults to 1.44 460 * Atari has a different ordening, defaults to 1.44
461 */ 461 */
462 fa.fa_deftype = &fd_types[2]; 462 fa.fa_deftype = &fd_types[2];
 463 /* Atari also configures ISA fdc(4) as "fdcisa" */
 464 (void)config_found_ia(fdc->sc_dev, "fdcisa", (void *)&fa, fdprint);
463#else 465#else
464 /* 466 /*
465 * Default to 1.44MB on Alpha and BeBox. How do we tell 467 * Default to 1.44MB on Alpha and BeBox. How do we tell
466 * on these platforms? 468 * on these platforms?
467 */ 469 */
468 fa.fa_deftype = &fd_types[0]; 470 fa.fa_deftype = &fd_types[0];
469#endif 
470 (void)config_found_ia(fdc->sc_dev, "fdc", (void *)&fa, fdprint); 471 (void)config_found_ia(fdc->sc_dev, "fdc", (void *)&fa, fdprint);
 472#endif
471 } 473 }
472 } 474 }
473 fdc->sc_state = DEVIDLE; 475 fdc->sc_state = DEVIDLE;
474} 476}
475 477
476int 478int
477fdprobe(device_t parent, cfdata_t match, void *aux) 479fdprobe(device_t parent, cfdata_t match, void *aux)
478{ 480{
479 struct fdc_softc *fdc = device_private(parent); 481 struct fdc_softc *fdc = device_private(parent);
480 cfdata_t cf = match; 482 cfdata_t cf = match;
481 struct fdc_attach_args *fa = aux; 483 struct fdc_attach_args *fa = aux;
482 int drive = fa->fa_drive; 484 int drive = fa->fa_drive;
483 bus_space_tag_t iot = fdc->sc_iot; 485 bus_space_tag_t iot = fdc->sc_iot;