@@ -1,4 +1,4 @@
-/*	$NetBSD: isadma.c,v 1.66 2010/11/13 13:52:03 uebayasi Exp $	*/
+/*	$NetBSD: isadma.c,v 1.66.52.1 2018/06/07 19:39:54 martin Exp $	*/
 
 /*-
  * Copyright (c) 1997, 1998, 2000 The NetBSD Foundation, Inc.
@@ -35,7 +35,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: isadma.c,v 1.66 2010/11/13 13:52:03 uebayasi Exp $");
+__KERNEL_RCSID(0, "$NetBSD: isadma.c,v 1.66.52.1 2018/06/07 19:39:54 martin Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -53,15 +53,19 @@
 struct isa_mem *isa_mem_head;
 
 /*
- * High byte of DMA address is stored in this DMAPG register for
- * the Nth DMA channel.
+ * DMA Channel to Address Page Register offset mapping
+ *
+ * Offset from IO_DMAPG is stored in this 2D array -- first dimension is
+ * the DMA controller, second dimension is the DMA channel.
+ *
+ * e.g. dmapageport[0][1] gives us the offset for DMA ch 1 on DMA1
  */
-static int dmapageport[2][4] = {
-	{0x7, 0x3, 0x1, 0x2},
-	{0xf, 0xb, 0x9, 0xa}
+static const int dmapageport[2][4] = {
+	{0x6, 0x2, 0x0, 0x1},
+	{0xe, 0xa, 0x8, 0x9}
 };
 
-static u_int8_t dmamode[] = {
+static const u_int8_t dmamode[] = {
 	/* write to device/read from device */
 	DMA37MD_READ | DMA37MD_SINGLE,
 	DMA37MD_WRITE | DMA37MD_SINGLE,
@@ -169,7 +173,7 @@
 		if (bus_space_map(ids->ids_bst, IO_DMA2, DMA2_IOSIZE, 0,
 		    &ids->ids_dma2h))
 			panic("_isa_dmainit: unable to map DMA controller #2");
-		if (bus_space_map(ids->ids_bst, IO_DMAPG, 0xf, 0,
+		if (bus_space_map(ids->ids_bst, IO_DMAPG, DMAPG_IOSIZE, 0,
 		    &ids->ids_dmapgh))
 			panic("_isa_dmainit: unable to map DMA page registers");
 
@@ -211,7 +215,7 @@
 	/*
 	 * Unmap the registers used by the ISA DMA controller.
 	 */
-	bus_space_unmap(ids->ids_bst, ids->ids_dmapgh, 0xf);
+	bus_space_unmap(ids->ids_bst, ids->ids_dmapgh, DMAPG_IOSIZE);
 	bus_space_unmap(ids->ids_bst, ids->ids_dma2h, DMA2_IOSIZE);
 	bus_space_unmap(ids->ids_bst, ids->ids_dma1h, DMA1_IOSIZE);
 

@@ -1,4 +1,4 @@
-/*	$NetBSD: isadmareg.h,v 1.8 2008/04/28 20:23:52 martin Exp $	*/
+/*	$NetBSD: isadmareg.h,v 1.8.80.1 2018/06/07 19:39:54 martin Exp $	*/
 
 /*-
  * Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -46,6 +46,9 @@
 
 #define	ISA_DMA_MAXSIZE_DEFAULT(chan)					\
 	(((chan) & 4) ? ISA_DMA_MAXSIZE_16BIT : ISA_DMA_MAXSIZE_8BIT)
+
+/* DMA Page Address Registers size */
+#define	DMAPG_IOSIZE	(1*15)
 
 /*
  * Register definitions for DMA controller 1 (channels 0..3):

@@ -1,4 +1,4 @@
-/*	$NetBSD: isareg.h,v 1.9 2005/12/11 12:22:02 christos Exp $	*/
+/*	$NetBSD: isareg.h,v 1.9.156.1 2018/06/07 19:39:54 martin Exp $	*/
 
 /*-
  * Copyright (c) 1990 The Regents of the University of California.
@@ -55,7 +55,7 @@
 #define	IO_PPI		0x061		/* Programmable Peripheral Interface */
 #define	IO_RTC		0x070		/* RTC */
 #define	IO_NMI		IO_RTC		/* NMI Control */
-#define	IO_DMAPG	0x080		/* DMA Page Registers */
+#define	IO_DMAPG	0x081		/* DMA Page Registers */
 #define	IO_ICU2		0x0A0		/* 8259A Interrupt Controller #2 */
 #define	IO_DMA2		0x0C0		/* 8237A DMA Controller #2 */
 #define	IO_NPX		0x0F0		/* Numeric Coprocessor */