@@ -1,4 +1,4 @@
-/* $NetBSD: ctlreg.h,v 1.29 2013/12/04 18:44:14 jdc Exp $ */
+/* $NetBSD: ctlreg.h,v 1.30 2019/08/29 05:55:18 msaitoh Exp $ */
/*
* Copyright (c) 1996
@@ -376,7 +376,7 @@
#define SFSR_BITS "\177\020" \
"b\21EM\0b\20CS\0b\17SB\0f\15\2PERR\0" \
"b\14UC\0b\13TO\0b\12BE\0f\10\2LVL\0" \
- "f\05\3AT\0f\02\3FT\0b\01FAV\0b\01OW"
+ "f\05\3AT\0f\02\3FT\0b\01FAV\0b\01OW\0"
/* [4m] Synchronous Fault Types */
#define SFSR_FT_NONE (0 << 2) /* no fault */
@@ -1,4 +1,4 @@
-/* $NetBSD: if_xgereg.h,v 1.2 2005/12/11 12:22:50 christos Exp $ */
+/* $NetBSD: if_xgereg.h,v 1.3 2019/08/29 05:55:19 msaitoh Exp $ */
/*
* Copyright (c) 2004, SUNET, Swedish University Computer Network.
@@ -85,7 +85,7 @@
"\177\20b\x3fTDMA_READY\0b\x3eRDMA_READY\0b\x3dPFC_READY\0" \
"b\x3cTMAC_BUF_EMPTY\0b\x3aPIC_QUIESCENT\0\x39RMAC_REMOTE_FAULT\0" \
"b\x38RMAC_LOCAL_FAULT\0b\x27MC_DRAM_READY\0b\x26MC_QUEUES_READY\0" \
- "b\x21M_PLL_LOCK\0b\x20P_PLL_LOCK"
+ "b\x21M_PLL_LOCK\0b\x20P_PLL_LOCK\0"
/*
* PCI-X registers