@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.20.2.1 2019/10/23 19:14:19 martin Exp $ */
+/* $NetBSD: cpu.c,v 1.20.2.2 2019/12/29 09:40:59 martin Exp $ */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo@nerv.org>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.20.2.1 2019/10/23 19:14:19 martin Exp $");
+__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.20.2.2 2019/12/29 09:40:59 martin Exp $");
 
 #include "locators.h"
 #include "opt_arm_debug.h"
@@ -196,6 +196,8 @@
 	{ CPU_ID_CORTEXA76AER1 & CPU_PARTMASK, "Cortex-A76AE", "Cortex", "V8.2-A+" },
 	{ CPU_ID_CORTEXA77R0 & CPU_PARTMASK, "Cortex-A77", "Cortex", "V8.2-A+" },
 	{ CPU_ID_EMAG8180 & CPU_PARTMASK, "Ampere eMAG", "Skylark", "V8-A" },
+	{ CPU_ID_NEOVERSEE1R1 & CPU_PARTMASK, "Neoverse E1", "Neoverse", "V8.2-A+" },
+	{ CPU_ID_NEOVERSEN1R3 & CPU_PARTMASK, "Neoverse N1", "Neoverse", "V8.2-A+" },
 	{ CPU_ID_THUNDERXRX, "Cavium ThunderX", "Cavium", "V8-A" },
 	{ CPU_ID_THUNDERX81XXRX, "Cavium ThunderX CN81XX", "Cavium", "V8-A" },
 	{ CPU_ID_THUNDERX83XXRX, "Cavium ThunderX CN83XX", "Cavium", "V8-A" },

@@ -1,4 +1,4 @@
-/*	$NetBSD: cputypes.h,v 1.8 2019/07/16 10:37:12 jmcneill Exp $	*/
+/*	$NetBSD: cputypes.h,v 1.8.2.1 2019/12/29 09:40:59 martin Exp $	*/
 
 /*
  * Copyright (c) 1998, 2001 Ben Harris
@@ -172,6 +172,8 @@
 #define CPU_ID_CORTEXA75R2	0x412fd0a0
 #define CPU_ID_CORTEXA76AER1	0x411fd0e0
 #define CPU_ID_CORTEXA76R3	0x413fd0b0
+#define CPU_ID_NEOVERSEN1R3	0x413fd0c0
+#define CPU_ID_NEOVERSEE1R1	0x411fd4a0
 #define CPU_ID_CORTEXA77R0	0x410fd0d0
 
 #define CPU_ID_CORTEX_P(n)	((n & 0xff0fe000) == 0x410fc000)