Wed Jan 29 05:54:29 2020 UTC ()
Adopt <net/if_stats.h>.


(thorpej)
diff -r1.21 -r1.22 src/sys/dev/cadence/if_cemac.c

cvs diff -r1.21 -r1.22 src/sys/dev/cadence/if_cemac.c (expand / switch to context diff)
--- src/sys/dev/cadence/if_cemac.c 2019/05/28 07:41:48 1.21
+++ src/sys/dev/cadence/if_cemac.c 2020/01/29 05:54:29 1.22
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_cemac.c,v 1.21 2019/05/28 07:41:48 msaitoh Exp $	*/
+/*	$NetBSD: if_cemac.c,v 1.22 2020/01/29 05:54:29 thorpej Exp $	*/
 
 /*
  * Copyright (c) 2015  Genetec Corporation.  All rights reserved.
@@ -40,7 +40,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_cemac.c,v 1.21 2019/05/28 07:41:48 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_cemac.c,v 1.22 2020/01/29 05:54:29 thorpej Exp $");
 
 #include <sys/types.h>
 #include <sys/param.h>
@@ -296,20 +296,21 @@
 #endif
 	DPRINTFN(2, ("%s: isr=0x%08X rsr=0x%08X imr=0x%08X\n", __FUNCTION__, isr, rsr, imr));
 
+	net_stat_ref_t nsr = IF_STAT_GETREF(ifp);
 	if (isr & ETH_ISR_RBNA) {		// out of receive buffers
 		CEMAC_WRITE(ETH_RSR, ETH_RSR_BNA);	// clear interrupt
 		ctl = CEMAC_READ(ETH_CTL);		// get current control register value
 		CEMAC_WRITE(ETH_CTL, ctl & ~ETH_CTL_RE);	// disable receiver
 		CEMAC_WRITE(ETH_RSR, ETH_RSR_BNA);	// clear BNA bit
 		CEMAC_WRITE(ETH_CTL, ctl |  ETH_CTL_RE);	// re-enable receiver
-		ifp->if_ierrors++;
-		ifp->if_ipackets++;
+		if_statinc_ref(nsr, if_ierrors);
+		if_statinc_ref(nsr, if_ipackets);
 		DPRINTFN(1,("%s: out of receive buffers\n", __FUNCTION__));
 	}
 	if (isr & ETH_ISR_ROVR) {
 		CEMAC_WRITE(ETH_RSR, ETH_RSR_OVR);	// clear interrupt
-		ifp->if_ierrors++;
-		ifp->if_ipackets++;
+		if_statinc_ref(nsr, if_ierrors);
+		if_statinc_ref(nsr, if_ipackets);
 		DPRINTFN(1,("%s: receive overrun\n", __FUNCTION__));
 	}
 
@@ -373,12 +374,14 @@
 				 */
 				if (m != NULL)
 					m_freem(m);
-				ifp->if_ierrors++;
+				if_statinc_ref(nsr, if_ierrors);
 			}
 			sc->rxqi++;
 		}
 	}
 
+	IF_STAT_PUTREF(ifp);
+
 	if (cemac_gctx(sc) > 0)
 		if_schedule_deferred_start(ifp);
 #if 0 // reloop
@@ -719,9 +722,11 @@
 	int s;
 
 	if (ISSET(sc->cemac_flags, CEMAC_FLAG_GEM))
-		ifp->if_collisions += CEMAC_READ(GEM_SCOL) + CEMAC_READ(GEM_MCOL);
+		if_statadd(ifp, if_collisions,
+		    CEMAC_READ(GEM_SCOL) + CEMAC_READ(GEM_MCOL));
 	else
-		ifp->if_collisions += CEMAC_READ(ETH_SCOL) + CEMAC_READ(ETH_MCOL);
+		if_statadd(ifp, if_collisions,
+		    CEMAC_READ(ETH_SCOL) + CEMAC_READ(ETH_MCOL));
 
 	/* These misses are ok, they will happen if the RAM/CPU can't keep up */
 	if (!ISSET(sc->cemac_flags, CEMAC_FLAG_GEM)) {