Sun Nov 1 12:13:21 2020 UTC ()
Add an isb() barrier after ICC_SGI1R_EL1 write to prevent reordering with
subsequent wfi/wfe instructions. Haven't seen this in practice but I would
rather be safe here.


(jmcneill)
diff -r1.29 -r1.30 src/sys/arch/arm/cortex/gicv3.c

cvs diff -r1.29 -r1.30 src/sys/arch/arm/cortex/gicv3.c (expand / switch to context diff)
--- src/sys/arch/arm/cortex/gicv3.c 2020/11/01 11:17:20 1.29
+++ src/sys/arch/arm/cortex/gicv3.c 2020/11/01 12:13:21 1.30
@@ -1,4 +1,4 @@
-/* $NetBSD: gicv3.c,v 1.29 2020/11/01 11:17:20 jmcneill Exp $ */
+/* $NetBSD: gicv3.c,v 1.30 2020/11/01 12:13:21 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2018 Jared McNeill <jmcneill@invisible.ca>
@@ -31,7 +31,7 @@
 #define	_INTR_PRIVATE
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.29 2020/11/01 11:17:20 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.30 2020/11/01 12:13:21 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/kernel.h>
@@ -435,6 +435,7 @@
 		sgir |= ci->ci_gic_sgir;
 	}
 	icc_sgi1r_write(sgir);
+	isb();
 }
 
 static void