Sun Nov 1 12:13:21 2020 UTC ()
Add an isb() barrier after ICC_SGI1R_EL1 write to prevent reordering with
subsequent wfi/wfe instructions. Haven't seen this in practice but I would
rather be safe here.


(jmcneill)
diff -r1.29 -r1.30 src/sys/arch/arm/cortex/gicv3.c
cvs diff -r1.29 -r1.30 src/sys/arch/arm/cortex/gicv3.c (expand / switch to unified diff)

--- src/sys/arch/arm/cortex/gicv3.c 2020/11/01 11:17:20 1.29
+++ src/sys/arch/arm/cortex/gicv3.c 2020/11/01 12:13:21 1.30
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: gicv3.c,v 1.29 2020/11/01 11:17:20 jmcneill Exp $ */ 1/* $NetBSD: gicv3.c,v 1.30 2020/11/01 12:13:21 jmcneill Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2018 Jared McNeill <jmcneill@invisible.ca> 4 * Copyright (c) 2018 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -21,27 +21,27 @@ @@ -21,27 +21,27 @@
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE. 26 * SUCH DAMAGE.
27 */ 27 */
28 28
29#include "opt_multiprocessor.h" 29#include "opt_multiprocessor.h"
30 30
31#define _INTR_PRIVATE 31#define _INTR_PRIVATE
32 32
33#include <sys/cdefs.h> 33#include <sys/cdefs.h>
34__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.29 2020/11/01 11:17:20 jmcneill Exp $"); 34__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.30 2020/11/01 12:13:21 jmcneill Exp $");
35 35
36#include <sys/param.h> 36#include <sys/param.h>
37#include <sys/kernel.h> 37#include <sys/kernel.h>
38#include <sys/bus.h> 38#include <sys/bus.h>
39#include <sys/device.h> 39#include <sys/device.h>
40#include <sys/intr.h> 40#include <sys/intr.h>
41#include <sys/systm.h> 41#include <sys/systm.h>
42#include <sys/cpu.h> 42#include <sys/cpu.h>
43#include <sys/vmem.h> 43#include <sys/vmem.h>
44 44
45#include <machine/cpufunc.h> 45#include <machine/cpufunc.h>
46 46
47#include <arm/locore.h> 47#include <arm/locore.h>
@@ -425,26 +425,27 @@ gicv3_ipi_send(struct pic_softc *pic, co @@ -425,26 +425,27 @@ gicv3_ipi_send(struct pic_softc *pic, co
425 if (kcp == NULL) { 425 if (kcp == NULL) {
426 /* Interrupts routed to all PEs, excluding "self" */ 426 /* Interrupts routed to all PEs, excluding "self" */
427 if (ncpu == 1) 427 if (ncpu == 1)
428 return; 428 return;
429 sgir |= ICC_SGIR_EL1_IRM; 429 sgir |= ICC_SGIR_EL1_IRM;
430 } else { 430 } else {
431 /* Interrupt to exactly one PE */ 431 /* Interrupt to exactly one PE */
432 ci = cpu_lookup(kcpuset_ffs(kcp) - 1); 432 ci = cpu_lookup(kcpuset_ffs(kcp) - 1);
433 if (ci == curcpu()) 433 if (ci == curcpu())
434 return; 434 return;
435 sgir |= ci->ci_gic_sgir; 435 sgir |= ci->ci_gic_sgir;
436 } 436 }
437 icc_sgi1r_write(sgir); 437 icc_sgi1r_write(sgir);
 438 isb();
438} 439}
439 440
440static void 441static void
441gicv3_get_affinity(struct pic_softc *pic, size_t irq, kcpuset_t *affinity) 442gicv3_get_affinity(struct pic_softc *pic, size_t irq, kcpuset_t *affinity)
442{ 443{
443 struct gicv3_softc * const sc = PICTOSOFTC(pic); 444 struct gicv3_softc * const sc = PICTOSOFTC(pic);
444 const size_t group = irq / 32; 445 const size_t group = irq / 32;
445 int n; 446 int n;
446 447
447 kcpuset_zero(affinity); 448 kcpuset_zero(affinity);
448 if (group == 0) { 449 if (group == 0) {
449 /* All CPUs are targets for group 0 (SGI/PPI) */ 450 /* All CPUs are targets for group 0 (SGI/PPI) */
450 for (n = 0; n < ncpu; n++) { 451 for (n = 0; n < ncpu; n++) {