 @@ -1,14 +1,14 @@
-/*	$NetBSD: netbsd32_machdep.c,v 1.7.2.1 2020/05/02 16:26:04 martin Exp $	*/
+/*	$NetBSD: netbsd32_machdep.c,v 1.7.2.2 2021/01/01 12:58:35 martin Exp $	*/
 /*
  * Copyright (c) 2018 Ryo Shimizu <ryo@nerv.org>
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -17,36 +17,37 @@
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: netbsd32_machdep.c,v 1.7.2.1 2020/05/02 16:26:04 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: netbsd32_machdep.c,v 1.7.2.2 2021/01/01 12:58:35 martin Exp $");
 #if defined(_KERNEL_OPT)
 #include "opt_compat_netbsd.h"
 #endif
 #include <sys/param.h>
 #include <sys/core.h>
 #include <sys/exec.h>
 #include <sys/lwp.h>
 #include <sys/ptrace.h>
 #include <sys/ras.h>
 #include <sys/signalvar.h>
 #include <sys/syscallargs.h>
 #include <uvm/uvm_extern.h>
 #include <compat/netbsd32/netbsd32.h>
 #include <compat/netbsd32/netbsd32_exec.h>
 #include <compat/netbsd32/netbsd32_syscallargs.h>
 #include <aarch64/armreg.h>
 #include <aarch64/cpufunc.h>
 #include <aarch64/frame.h>
 @@ -83,59 +84,83 @@ netbsd32_setregs(struct lwp *l, struct e
 	/* set 32bit mode, and same endian as 64bit's */
 #ifdef __AARCH64EB__
 	tf->tf_spsr = SPSR_M_USR32 | SPSR_A32_E;
 #else
 	tf->tf_spsr = SPSR_M_USR32;
 #endif
 	/* THUMB CODE? */
 	if (pack->ep_entry & 1)
 		tf->tf_spsr |= SPSR_A32_T;
+}
 int
 netbsd32_ptrace_translate_request(int req)
+{
 	switch (req) {
 	case 0 ... PT_FIRSTMACH - 1:
 		return req;
 	case PT32_GETREGS:
 		return PT_GETREGS;
 	case PT32_SETREGS:
 		return PT_SETREGS;
 	case PT32_GETFPREGS:
 		return PT_GETFPREGS;
 	case PT32_SETFPREGS:
 		return PT_SETFPREGS;
 	/* not implemented for arm32 */
 	case PT32_STEP:
 	case PT32_SETSTEP:
 	case PT32_CLEARSTEP:
 	default:
 		return -1;
+	}
+}
 /* aarch32 fpscr register is assigned to two registers fpsr/fpcr on aarch64 */
 #define FPSR_BITS							\
 	(FPSR_N32|FPSR_Z32|FPSR_C32|FPSR_V32|FPSR_QC|			\
 	 FPSR_IDC|FPSR_IXC|FPSR_UFC|FPSR_OFC|FPSR_DZC|FPSR_IOC)
 #define FPCR_BITS							\
 	(FPCR_AHP|FPCR_DN|FPCR_FZ|FPCR_RMODE|FPCR_STRIDE|FPCR_LEN|	\
 	 FPCR_IDE|FPCR_IXE|FPCR_UFE|FPCR_OFE|FPCR_DZE|FPCR_IOE)
-static int
+int
 netbsd32_process_read_regs(struct lwp *l, struct reg32 *regs)
+{
 	struct proc * const p = l->l_proc;
 	struct trapframe *tf = l->l_md.md_utf;
 	int i;
 	if ((p->p_flag & PK_32) == 0)
 		return EINVAL;
 	for (i = 0; i < 13; i++)
 		regs->r[i] = tf->tf_reg[i];	/* r0-r12 */
 	regs->r_sp = tf->tf_reg[13];		/* r13 = sp */
 	regs->r_lr = tf->tf_reg[14];		/* r14 = lr */
 	regs->r_pc = tf->tf_pc;			/* r15 = pc */
 	regs->r_cpsr = tf->tf_spsr;
 	/* THUMB CODE? */
 	if (tf->tf_spsr & SPSR_A32_T)
 		regs->r_pc |= 1;
 	return 0;
+}
-static int
+int
 netbsd32_process_read_fpregs(struct lwp *l, struct fpreg32 *fpregs,
     size_t *lenp)
+{
 	struct proc * const p = l->l_proc;
 	struct pcb * const pcb = lwp_getpcb(l);
 	int i;
 	if ((p->p_flag & PK_32) == 0)
 		return EINVAL;
 	KASSERT(*lenp <= sizeof(*fpregs));
 	fpu_save(l);
 @@ -155,26 +180,88 @@ netbsd32_process_read_fpregs(struct lwp
 	for (i = 0; i < 32; i++) {
 #ifdef __AARCH64EB__
 		fpregs->fpr_vfp.vfp_regs[i] = pcb->pcb_fpregs.fp_reg[i].u64[1];
 #else
 		fpregs->fpr_vfp.vfp_regs[i] = pcb->pcb_fpregs.fp_reg[i].u64[0];
 #endif
+	}
 	return 0;
+}
 int
 netbsd32_process_write_regs(struct lwp *l, const struct reg32 *regs)
+{
 	struct proc * const p = l->l_proc;
 	struct trapframe *tf = l->l_md.md_utf;
 	int i;
 	if ((p->p_flag & PK_32) == 0)
 		return EINVAL;
 	if (regs->r_pc >= VM_MAXUSER_ADDRESS32 ||
 	    regs->r_sp >= VM_MAXUSER_ADDRESS32)
 		return EINVAL;
 	for (i = 0; i < 13; i++)
 		tf->tf_reg[i] = regs->r[i];	/* r0-r12 */
 	tf->tf_reg[13] = regs->r_sp;		/* r13 = sp */
 	tf->tf_reg[14] = regs->r_lr;		/* r14 = lr */
 	tf->tf_pc = regs->r_pc;			/* r15 = pc */
 	tf->tf_spsr &= ~(SPSR_NZCV | SPSR_A32_T);
 	tf->tf_spsr |= regs->r_cpsr & (SPSR_NZCV | SPSR_A32_T);
 	/* THUMB CODE? */
 	if (regs->r_pc & 1)
 		tf->tf_spsr |= SPSR_A32_T;
 	return 0;
+}
 int
 netbsd32_process_write_fpregs(struct lwp *l, const struct fpreg32 *fpregs,
     size_t len)
+{
 	struct proc * const p = l->l_proc;
 	struct pcb * const pcb = lwp_getpcb(l);
 	int i;
 	if ((p->p_flag & PK_32) == 0)
 		return EINVAL;
 	KASSERT(len <= sizeof(*fpregs));
 	fpu_discard(l, true);		// set used flag
 	pcb->pcb_fpregs.fpsr = fpregs->fpr_vfp.vfp_fpscr & FPSR_BITS;
 	pcb->pcb_fpregs.fpcr = fpregs->fpr_vfp.vfp_fpscr & FPCR_BITS;
 	CTASSERT(__arraycount(fpregs->fpr_vfp.vfp_regs) ==
 	    __arraycount(pcb->pcb_fpregs.fp_reg) + 1);
 	for (i = 0; i < __arraycount(pcb->pcb_fpregs.fp_reg); i++) {
 #ifdef __AARCH64EB__
 		pcb->pcb_fpregs.fp_reg[i].u64[0] = 0;
 		pcb->pcb_fpregs.fp_reg[i].u64[1] =
 #else
 		pcb->pcb_fpregs.fp_reg[i].u64[1] = 0;
 		pcb->pcb_fpregs.fp_reg[i].u64[0] =
 #endif
 		    fpregs->fpr_vfp.vfp_regs[i];
+	}
 	return 0;
+}
 int
 cpu_coredump32(struct lwp *l, struct coredump_iostate *iocookie,
     struct core32 *chdr)
+{
 	struct netbsd32_cpustate md_core32;
 	struct coreseg32 cseg;
 	int error;
 	if (iocookie == NULL) {
 		CORE_SETMAGIC(*chdr, COREMAGIC, MID_ARM6, 0);
 		chdr->c_hdrsize = ALIGN32(sizeof(*chdr));
 		chdr->c_seghdrsize = ALIGN32(sizeof(cseg));
 		chdr->c_cpusize = sizeof(md_core32);
 		chdr->c_nseg++;

 @@ -1,14 +1,14 @@
-/* $NetBSD: trap.c,v 1.17.4.3 2021/01/01 12:31:19 martin Exp $ */
+/* $NetBSD: trap.c,v 1.17.4.4 2021/01/01 12:58:35 martin Exp $ */
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Matt Thomas of 3am Software Foundry.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -21,27 +21,27 @@
  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.17.4.3 2021/01/01 12:31:19 martin Exp $");
+__KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.17.4.4 2021/01/01 12:58:35 martin Exp $");
 #include "opt_arm_intr_impl.h"
 #include "opt_compat_netbsd32.h"
 #include "opt_dtrace.h"
 #include <sys/param.h>
 #include <sys/kauth.h>
 #include <sys/types.h>
 #include <sys/atomic.h>
 #include <sys/cpu.h>
 #ifdef KDB
 #include <sys/kdb.h>
 #endif
 @@ -386,41 +386,58 @@ fetch_arm_insn(struct trapframe *tf, uin
 	return 4;
+}
 enum emul_arm_result {
 	EMUL_ARM_SUCCESS = 0,
 	EMUL_ARM_UNKNOWN,
 	EMUL_ARM_FAULT,
 };
 static enum emul_arm_result
 emul_arm_insn(struct trapframe *tf)
+{
 	struct lwp * const l = curlwp;
 	uint32_t insn;
 	int insn_size;
 	insn_size = fetch_arm_insn(tf, &insn);
 	switch (insn_size) {
 	case 2:
 		/* T32-16bit instruction */
 		/*
 		 * Breakpoint used by GDB.
 		 */
 		if (insn == 0xdefe)
 			goto trap;
 		/* XXX: some T32 IT instruction deprecated should be emulated */
 		break;
 	case 4:
 		/* T32-32bit instruction, or A32 instruction */
 		/*
 		 * Breakpoint used by GDB.
 		 */
 		if (insn == 0xe6000011 || insn == 0xe7ffdefe) {
  trap:
 			do_trapsignal(l, SIGTRAP, TRAP_BRKPT,
 			    (void *)tf->tf_pc, 0);
 			return 0;
+		}
 		/*
 		 * Emulate ARMv6 instructions with cache operations
 		 * register (c7), that can be used in user mode.
 		 */
 		switch (insn & 0x0fff0fff) {
 		case 0x0e070f95:
 			/*
 			 * mcr p15, 0, <Rd>, c7, c5, 4
 			 * (flush prefetch buffer)
 			 */
 			__asm __volatile("isb sy" ::: "memory");
 			goto emulated;
 		case 0x0e070f9a:
 			/*

 @@ -1,22 +1,34 @@
-/*	$NetBSD: netbsd32_machdep.h,v 1.2 2018/10/12 01:28:58 ryo Exp $	*/
+/*	$NetBSD: netbsd32_machdep.h,v 1.2.4.1 2021/01/01 12:58:35 martin Exp $	*/
 #ifndef _MACHINE_NETBSD32_H_
 #define _MACHINE_NETBSD32_H_
 #include <sys/ucontext.h>
 #include <compat/sys/ucontext.h>
 #include <compat/sys/siginfo.h>
 /*
  * arm ptrace constants
  * Please keep in sync with sys/arch/arm/include/ptrace.h.
  */
 #define PT32_STEP	(PT_FIRSTMACH + 0) /* Not implemented */
 #define PT32_GETREGS	(PT_FIRSTMACH + 1)
 #define PT32_SETREGS	(PT_FIRSTMACH + 2)
 #define PT32_GETFPREGS	(PT_FIRSTMACH + 5)
 #define PT32_SETFPREGS	(PT_FIRSTMACH + 6)
 #define PT32_SETSTEP	(PT_FIRSTMACH + 7) /* Not implemented */
 #define PT32_CLEARSTEP	(PT_FIRSTMACH + 8) /* Not implemented */
 #define NETBSD32_POINTER_TYPE uint32_t
 typedef	struct { NETBSD32_POINTER_TYPE i32; } netbsd32_pointer_t;
 /* earm has 64bit aligned 64bit integers */
 #define NETBSD32_INT64_ALIGN __attribute__((__aligned__(8)))
 typedef netbsd32_pointer_t netbsd32_sigcontextp_t;
 struct netbsd32_sigcontext13 {
 	int32_t		sc_onstack;		/* sigstack state to restore */
 	int32_t		__sc_mask13;		/* signal mask to restore (old style) */
 	uint32_t	sc_spsr;
 @@ -93,18 +105,27 @@ struct fpreg32 {
 /* same as cpustate in arm/arm/core_machdep.c  */
 struct netbsd32_cpustate {
 	struct reg32 regs;
 	struct fpreg32 fpregs;
 };
 /* compat netbsd/arm sysarch(2) */
 #define ARM_SYNC_ICACHE		0
 #define ARM_DRAIN_WRITEBUF	1
 #define ARM_VFP_FPSCR		2
 #define ARM_FPU_USED		3
 struct netbsd32_arm_sync_icache_args {
-	netbsd32_uintptr_t addr;	/* Virtual start address */
+	uint32_t addr;		/* Virtual start address */
-	netbsd32_size_t len;		/* Region size */
+	uint32_t len;		/* Region size */
 };
 /* Translate ptrace() PT_* request from 32-bit userland to kernel. */
 int netbsd32_ptrace_translate_request(int);
 int netbsd32_process_read_regs(struct lwp *, struct reg32 *);
 int netbsd32_process_read_fpregs(struct lwp *, struct fpreg32 *, size_t *);
 int netbsd32_process_write_regs(struct lwp *, const struct reg32 *);
 int netbsd32_process_write_fpregs(struct lwp *, const struct fpreg32 *, size_t);
 #endif /* _MACHINE_NETBSD32_H_ */

 @@ -1,14 +1,14 @@
-/* $NetBSD: ptrace.h,v 1.9 2019/06/18 21:18:11 kamil Exp $ */
+/* $NetBSD: ptrace.h,v 1.9.2.1 2021/01/01 12:58:35 martin Exp $ */
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Matt Thomas of 3am Software Foundry.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -56,20 +56,39 @@
 #include <machine/reg.h>
 #define PTRACE_REG_PC(r)	(r)->r_pc
 #define PTRACE_REG_FP(r)	(r)->r_reg[29]
 #define PTRACE_REG_SET_PC(r, v)	(r)->r_pc = (v)
 #define PTRACE_REG_SP(r)	(r)->r_sp
 #define PTRACE_REG_INTRV(r)	(r)->r_reg[0]
 #define PTRACE_BREAKPOINT	((const uint8_t[]) { 0xa0, 0x01, 0x20, 0xd4 })
 #define PTRACE_BREAKPOINT_ASM	__asm __volatile("brk #13" ::: "memory")
 #define PTRACE_BREAKPOINT_SIZE	4
 #ifdef _KERNEL_OPT
 #include "opt_compat_netbsd32.h"
 #endif
 #ifdef COMPAT_NETBSD32
 #include <machine/netbsd32_machdep.h>
 #define process_read_regs32	netbsd32_process_read_regs
 #define process_read_fpregs32	netbsd32_process_read_fpregs
 #define process_write_regs32	netbsd32_process_write_regs
 #define process_write_fpregs32	netbsd32_process_write_fpregs
 #define process_reg32		struct reg32
 #define process_fpreg32		struct fpreg32
 #define PTRACE_TRANSLATE_REQUEST32(x) netbsd32_ptrace_translate_request(x)
 #endif /* COMPAT_NETBSD32 */
 #elif defined(__arm__)
 #include <arm/ptrace.h>
 #endif
 #endif /* _AARCH64_PTRACE_H_ */