Fix build without MULTIPROCESSOR.diff -r1.15 -r1.16 src/sys/arch/arm/altera/cycv_platform.c
(rin)
--- src/sys/arch/arm/altera/cycv_platform.c 2020/11/27 07:11:49 1.15
+++ src/sys/arch/arm/altera/cycv_platform.c 2021/01/29 13:10:07 1.16
@@ -1,4 +1,4 @@
-/* $NetBSD: cycv_platform.c,v 1.15 2020/11/27 07:11:49 skrll Exp $ */
+/* $NetBSD: cycv_platform.c,v 1.16 2021/01/29 13:10:07 rin Exp $ */
/* This file is in the public domain. */
@@ -7,7 +7,7 @@
#include "opt_multiprocessor.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cycv_platform.c,v 1.15 2020/11/27 07:11:49 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cycv_platform.c,v 1.16 2021/01/29 13:10:07 rin Exp $");
#define _ARM32_BUS_DMA_PRIVATE
#include <sys/param.h>
@@ -79,10 +79,12 @@
static int
cycv_mpstart(void)
{
+ int ret = 0;
+
+#ifdef MULTIPROCESSOR
bus_space_tag_t bst = &armv7_generic_bs_tag;
bus_space_handle_t bsh_rst;
bus_space_handle_t bsh_scu;
- int ret = 0;
bus_space_map(bst, CYCV_RSTMGR_BASE, CYCV_RSTMGR_SIZE, 0, &bsh_rst);
bus_space_map(bst, CYCV_SCU_BASE, CYCV_SCU_SIZE, 0, &bsh_scu);
@@ -123,6 +125,7 @@
aprint_error("cpu%d: WARNING: AP failed to start\n", 1);
ret++;
}
+#endif
return ret;
}
--- src/sys/arch/arm/amlogic/meson_platform.c 2020/09/28 11:54:22 1.16
+++ src/sys/arch/arm/amlogic/meson_platform.c 2021/01/29 13:10:07 1.17
@@ -1,4 +1,4 @@
-/* $NetBSD: meson_platform.c,v 1.16 2020/09/28 11:54:22 jmcneill Exp $ */
+/* $NetBSD: meson_platform.c,v 1.17 2021/01/29 13:10:07 rin Exp $ */
/*-
* Copyright (c) 2019 Jared McNeill <jmcneill@invisible.ca>
@@ -33,7 +33,7 @@
#include "arml2cc.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: meson_platform.c,v 1.16 2020/09/28 11:54:22 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: meson_platform.c,v 1.17 2021/01/29 13:10:07 rin Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -319,16 +319,19 @@
}
}
+#ifdef MULTIPROCESSOR
static void
meson8b_mpinit_delay(u_int n)
{
for (volatile int i = 0; i < n; i++)
;
}
+#endif
static int
cpu_enable_meson8b(int phandle)
{
+#ifdef MULTIPROCESSOR
const bus_addr_t cbar = armreg_cbar_read();
bus_space_tag_t bst = &arm_generic_bs_tag;
@@ -396,6 +399,7 @@
uint32_t ctrl = bus_space_read_4(bst, cpuconf_bsh, MESON8B_SRAM_CPUCONF_CTRL_REG);
ctrl |= __BITS(cpuno,0);
bus_space_write_4(bst, cpuconf_bsh, MESON8B_SRAM_CPUCONF_CTRL_REG, ctrl);
+#endif
return 0;
}
--- src/sys/arch/arm/nxp/imx6_platform.c 2021/01/27 03:10:20 1.2
+++ src/sys/arch/arm/nxp/imx6_platform.c 2021/01/29 13:10:07 1.3
@@ -1,4 +1,4 @@
-/* $NetBSD: imx6_platform.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $ */
+/* $NetBSD: imx6_platform.c,v 1.3 2021/01/29 13:10:07 rin Exp $ */
/*-
* Copyright (c) 2019 Genetec Corporation. All rights reserved.
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: imx6_platform.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_platform.c,v 1.3 2021/01/29 13:10:07 rin Exp $");
#include "arml2cc.h"
#include "opt_console.h"
@@ -191,6 +191,8 @@
bus_space_unmap(bst, bsh, AIPS1_SRC_SIZE);
return arm_fdt_cpu_mpstart();
+#else
+ return 0;
#endif
}
--- src/sys/arch/arm/ti/ti_gpio.c 2021/01/29 13:07:32 1.11
+++ src/sys/arch/arm/ti/ti_gpio.c 2021/01/29 13:10:07 1.12
@@ -1,4 +1,4 @@
-/* $NetBSD: ti_gpio.c,v 1.11 2021/01/29 13:07:32 rin Exp $ */
+/* $NetBSD: ti_gpio.c,v 1.12 2021/01/29 13:10:07 rin Exp $ */
/*-
* Copyright (c) 2019 Jared McNeill <jmcneill@invisible.ca>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ti_gpio.c,v 1.11 2021/01/29 13:07:32 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ti_gpio.c,v 1.12 2021/01/29 13:10:07 rin Exp $");
#include <sys/param.h>
#include <sys/bitops.h>
@@ -36,6 +36,7 @@
#include <sys/gpio.h>
#include <sys/intr.h>
#include <sys/kmem.h>
+#include <sys/lwp.h>
#include <sys/mutex.h>
#include <sys/systm.h>