Thu Mar 3 06:26:06 2022 UTC ()
arm: Use device_set_private for cpuN.

For cpu at fdt, nix the fdt softc -- this was leaked and never used
for anything.  The device's private storage is the cpu_info.


(riastradh)
diff -r1.68 -r1.69 src/sys/arch/aarch64/aarch64/cpu.c
diff -r1.152 -r1.153 src/sys/arch/arm/arm32/cpu.c
diff -r1.41 -r1.42 src/sys/arch/arm/fdt/cpu_fdt.c

cvs diff -r1.68 -r1.69 src/sys/arch/aarch64/aarch64/cpu.c (expand / switch to unified diff)

--- src/sys/arch/aarch64/aarch64/cpu.c 2021/11/12 06:44:46 1.68
+++ src/sys/arch/aarch64/aarch64/cpu.c 2022/03/03 06:26:05 1.69
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: cpu.c,v 1.68 2021/11/12 06:44:46 skrll Exp $ */ 1/* $NetBSD: cpu.c,v 1.69 2022/03/03 06:26:05 riastradh Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2017 Ryo Shimizu <ryo@nerv.org> 4 * Copyright (c) 2017 Ryo Shimizu <ryo@nerv.org>
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -17,27 +17,27 @@ @@ -17,27 +17,27 @@
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
25 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE. 26 * POSSIBILITY OF SUCH DAMAGE.
27 */ 27 */
28 28
29#include <sys/cdefs.h> 29#include <sys/cdefs.h>
30__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.68 2021/11/12 06:44:46 skrll Exp $"); 30__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.69 2022/03/03 06:26:05 riastradh Exp $");
31 31
32#include "locators.h" 32#include "locators.h"
33#include "opt_arm_debug.h" 33#include "opt_arm_debug.h"
34#include "opt_ddb.h" 34#include "opt_ddb.h"
35#include "opt_fdt.h" 35#include "opt_fdt.h"
36#include "opt_multiprocessor.h" 36#include "opt_multiprocessor.h"
37 37
38#include <sys/param.h> 38#include <sys/param.h>
39#include <sys/atomic.h> 39#include <sys/atomic.h>
40#include <sys/cpu.h> 40#include <sys/cpu.h>
41#include <sys/device.h> 41#include <sys/device.h>
42#include <sys/kmem.h> 42#include <sys/kmem.h>
43#include <sys/reboot.h> 43#include <sys/reboot.h>
@@ -118,42 +118,42 @@ cpu_attach(device_t dv, cpuid_t id) @@ -118,42 +118,42 @@ cpu_attach(device_t dv, cpuid_t id)
118 return; 118 return;
119 } 119 }
120 120
121 KASSERT(unit < MAXCPUS); 121 KASSERT(unit < MAXCPUS);
122 ci = &cpu_info_store[unit]; 122 ci = &cpu_info_store[unit];
123 123
124 ci->ci_cpl = IPL_HIGH; 124 ci->ci_cpl = IPL_HIGH;
125 ci->ci_cpuid = id; 125 ci->ci_cpuid = id;
126 /* ci_id is stored by own cpus when hatching */ 126 /* ci_id is stored by own cpus when hatching */
127 127
128 cpu_info[ncpu] = ci; 128 cpu_info[ncpu] = ci;
129 if (cpu_hatched_p(unit) == 0) { 129 if (cpu_hatched_p(unit) == 0) {
130 ci->ci_dev = dv; 130 ci->ci_dev = dv;
131 dv->dv_private = ci; 131 device_set_private(dv, ci);
132 ci->ci_index = -1; 132 ci->ci_index = -1;
133 133
134 aprint_naive(": disabled\n"); 134 aprint_naive(": disabled\n");
135 aprint_normal(": disabled (unresponsive)\n"); 135 aprint_normal(": disabled (unresponsive)\n");
136 return; 136 return;
137 } 137 }
138#else /* MULTIPROCESSOR */ 138#else /* MULTIPROCESSOR */
139 aprint_naive(": disabled\n"); 139 aprint_naive(": disabled\n");
140 aprint_normal(": disabled (uniprocessor kernel)\n"); 140 aprint_normal(": disabled (uniprocessor kernel)\n");
141 return; 141 return;
142#endif /* MULTIPROCESSOR */ 142#endif /* MULTIPROCESSOR */
143 } 143 }
144 144
145 ci->ci_dev = dv; 145 ci->ci_dev = dv;
146 dv->dv_private = ci; 146 device_set_private(dv, ci);
147 147
148 ci->ci_kfpu_spl = -1; 148 ci->ci_kfpu_spl = -1;
149 149
150 arm_cpu_do_topology(ci); // XXXNH move this after mi_cpu_attach 150 arm_cpu_do_topology(ci); // XXXNH move this after mi_cpu_attach
151 cpu_identify(dv, ci); 151 cpu_identify(dv, ci);
152 152
153 cpu_setup_sysctl(dv, ci); 153 cpu_setup_sysctl(dv, ci);
154 154
155#ifdef MULTIPROCESSOR 155#ifdef MULTIPROCESSOR
156 if (unit != 0) { 156 if (unit != 0) {
157 mi_cpu_attach(ci); 157 mi_cpu_attach(ci);
158 pmap_tlb_info_attach(&pmap_tlb0_info, ci); 158 pmap_tlb_info_attach(&pmap_tlb0_info, ci);
159 aarch64_parsecacheinfo(ci); 159 aarch64_parsecacheinfo(ci);

cvs diff -r1.152 -r1.153 src/sys/arch/arm/arm32/cpu.c (expand / switch to unified diff)

--- src/sys/arch/arm/arm32/cpu.c 2021/10/31 16:23:47 1.152
+++ src/sys/arch/arm/arm32/cpu.c 2022/03/03 06:26:05 1.153
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: cpu.c,v 1.152 2021/10/31 16:23:47 skrll Exp $ */ 1/* $NetBSD: cpu.c,v 1.153 2022/03/03 06:26:05 riastradh Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 1995 Mark Brinicombe. 4 * Copyright (c) 1995 Mark Brinicombe.
5 * Copyright (c) 1995 Brini. 5 * Copyright (c) 1995 Brini.
6 * All rights reserved. 6 * All rights reserved.
7 * 7 *
8 * Redistribution and use in source and binary forms, with or without 8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions 9 * modification, are permitted provided that the following conditions
10 * are met: 10 * are met:
11 * 1. Redistributions of source code must retain the above copyright 11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer. 12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright 13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the 14 * notice, this list of conditions and the following disclaimer in the
@@ -36,27 +36,27 @@ @@ -36,27 +36,27 @@
36 * 36 *
37 * cpu.c 37 * cpu.c
38 * 38 *
39 * Probing and configuration for the master CPU 39 * Probing and configuration for the master CPU
40 * 40 *
41 * Created : 10/10/95 41 * Created : 10/10/95
42 */ 42 */
43 43
44#include "opt_armfpe.h" 44#include "opt_armfpe.h"
45#include "opt_cputypes.h" 45#include "opt_cputypes.h"
46#include "opt_multiprocessor.h" 46#include "opt_multiprocessor.h"
47 47
48#include <sys/cdefs.h> 48#include <sys/cdefs.h>
49__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.152 2021/10/31 16:23:47 skrll Exp $"); 49__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.153 2022/03/03 06:26:05 riastradh Exp $");
50 50
51#include <sys/param.h> 51#include <sys/param.h>
52 52
53#include <sys/conf.h> 53#include <sys/conf.h>
54#include <sys/cpu.h> 54#include <sys/cpu.h>
55#include <sys/device.h> 55#include <sys/device.h>
56#include <sys/kmem.h> 56#include <sys/kmem.h>
57#include <sys/proc.h> 57#include <sys/proc.h>
58#include <sys/reboot.h> 58#include <sys/reboot.h>
59#include <sys/systm.h> 59#include <sys/systm.h>
60 60
61#include <uvm/uvm_extern.h> 61#include <uvm/uvm_extern.h>
62 62
@@ -118,40 +118,40 @@ cpu_attach(device_t dv, cpuid_t id) @@ -118,40 +118,40 @@ cpu_attach(device_t dv, cpuid_t id)
118 KASSERT(unit < MAXCPUS); 118 KASSERT(unit < MAXCPUS);
119 ci = &cpu_info_store[unit]; 119 ci = &cpu_info_store[unit];
120 120
121 KASSERT(cpu_info[unit] == NULL); 121 KASSERT(cpu_info[unit] == NULL);
122 ci->ci_cpl = IPL_HIGH; 122 ci->ci_cpl = IPL_HIGH;
123 ci->ci_cpuid = id; 123 ci->ci_cpuid = id;
124 ci->ci_data.cpu_cc_freq = cpu_info_store[0].ci_data.cpu_cc_freq; 124 ci->ci_data.cpu_cc_freq = cpu_info_store[0].ci_data.cpu_cc_freq;
125 125
126 ci->ci_undefsave[2] = cpu_info_store[0].ci_undefsave[2]; 126 ci->ci_undefsave[2] = cpu_info_store[0].ci_undefsave[2];
127 127
128 cpu_info[unit] = ci; 128 cpu_info[unit] = ci;
129 if (cpu_hatched_p(unit) == false) { 129 if (cpu_hatched_p(unit) == false) {
130 ci->ci_dev = dv; 130 ci->ci_dev = dv;
131 dv->dv_private = ci; 131 device_set_private(dv, ci);
132 aprint_naive(": disabled\n"); 132 aprint_naive(": disabled\n");
133 aprint_normal(": disabled (unresponsive)\n"); 133 aprint_normal(": disabled (unresponsive)\n");
134 return; 134 return;
135 } 135 }
136#else 136#else
137 aprint_naive(": disabled\n"); 137 aprint_naive(": disabled\n");
138 aprint_normal(": disabled (uniprocessor kernel)\n"); 138 aprint_normal(": disabled (uniprocessor kernel)\n");
139 return; 139 return;
140#endif 140#endif
141 } 141 }
142 142
143 ci->ci_dev = dv; 143 ci->ci_dev = dv;
144 dv->dv_private = ci; 144 device_set_private(dv, ci);
145 145
146 arm_cpu_do_topology(ci); 146 arm_cpu_do_topology(ci);
147 147
148 evcnt_attach_dynamic(&ci->ci_arm700bugcount, EVCNT_TYPE_MISC, 148 evcnt_attach_dynamic(&ci->ci_arm700bugcount, EVCNT_TYPE_MISC,
149 NULL, xname, "arm700swibug"); 149 NULL, xname, "arm700swibug");
150 150
151 evcnt_attach_dynamic_nozero(&ci->ci_abt_evs[FAULT_WRTBUF_0], EVCNT_TYPE_TRAP, 151 evcnt_attach_dynamic_nozero(&ci->ci_abt_evs[FAULT_WRTBUF_0], EVCNT_TYPE_TRAP,
152 NULL, xname, "vector abort"); 152 NULL, xname, "vector abort");
153 evcnt_attach_dynamic_nozero(&ci->ci_abt_evs[FAULT_WRTBUF_1], EVCNT_TYPE_TRAP, 153 evcnt_attach_dynamic_nozero(&ci->ci_abt_evs[FAULT_WRTBUF_1], EVCNT_TYPE_TRAP,
154 NULL, xname, "terminal abort"); 154 NULL, xname, "terminal abort");
155 evcnt_attach_dynamic_nozero(&ci->ci_abt_evs[FAULT_BUSERR_0], EVCNT_TYPE_TRAP, 155 evcnt_attach_dynamic_nozero(&ci->ci_abt_evs[FAULT_BUSERR_0], EVCNT_TYPE_TRAP,
156 NULL, xname, "external linefetch abort (S)"); 156 NULL, xname, "external linefetch abort (S)");
157 evcnt_attach_dynamic_nozero(&ci->ci_abt_evs[FAULT_BUSERR_1], EVCNT_TYPE_TRAP, 157 evcnt_attach_dynamic_nozero(&ci->ci_abt_evs[FAULT_BUSERR_1], EVCNT_TYPE_TRAP,

cvs diff -r1.41 -r1.42 src/sys/arch/arm/fdt/cpu_fdt.c (expand / switch to unified diff)

--- src/sys/arch/arm/fdt/cpu_fdt.c 2021/08/30 23:16:17 1.41
+++ src/sys/arch/arm/fdt/cpu_fdt.c 2022/03/03 06:26:05 1.42
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: cpu_fdt.c,v 1.41 2021/08/30 23:16:17 jmcneill Exp $ */ 1/* $NetBSD: cpu_fdt.c,v 1.42 2022/03/03 06:26:05 riastradh Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca> 4 * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -20,86 +20,77 @@ @@ -20,86 +20,77 @@
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE. 26 * SUCH DAMAGE.
27 */ 27 */
28 28
29#include "opt_multiprocessor.h" 29#include "opt_multiprocessor.h"
30#include "psci_fdt.h" 30#include "psci_fdt.h"
31 31
32#include <sys/cdefs.h> 32#include <sys/cdefs.h>
33__KERNEL_RCSID(0, "$NetBSD: cpu_fdt.c,v 1.41 2021/08/30 23:16:17 jmcneill Exp $"); 33__KERNEL_RCSID(0, "$NetBSD: cpu_fdt.c,v 1.42 2022/03/03 06:26:05 riastradh Exp $");
34 34
35#include <sys/param.h> 35#include <sys/param.h>
36#include <sys/atomic.h> 36#include <sys/atomic.h>
37#include <sys/bus.h> 37#include <sys/bus.h>
38#include <sys/device.h> 38#include <sys/device.h>
39#include <sys/lwp.h> 39#include <sys/lwp.h>
40#include <sys/systm.h> 40#include <sys/systm.h>
41#include <sys/kernel.h> 41#include <sys/kernel.h>
42 42
43#include <dev/fdt/fdtvar.h> 43#include <dev/fdt/fdtvar.h>
44 44
45#include <arm/armreg.h> 45#include <arm/armreg.h>
46#include <arm/cpu.h> 46#include <arm/cpu.h>
47#include <arm/cpufunc.h> 47#include <arm/cpufunc.h>
48#include <arm/cpuvar.h> 48#include <arm/cpuvar.h>
49#include <arm/locore.h> 49#include <arm/locore.h>
50 50
51#include <arm/arm/psci.h> 51#include <arm/arm/psci.h>
52#include <arm/fdt/arm_fdtvar.h> 52#include <arm/fdt/arm_fdtvar.h>
53#include <arm/fdt/psci_fdtvar.h> 53#include <arm/fdt/psci_fdtvar.h>
54 54
55#include <uvm/uvm_extern.h> 55#include <uvm/uvm_extern.h>
56 56
57static int cpu_fdt_match(device_t, cfdata_t, void *); 57static int cpu_fdt_match(device_t, cfdata_t, void *);
58static void cpu_fdt_attach(device_t, device_t, void *); 58static void cpu_fdt_attach(device_t, device_t, void *);
59 59
60struct cpu_fdt_softc { 60CFATTACH_DECL_NEW(cpu_fdt, 0,
61 device_t sc_dev; 
62 int sc_phandle; 
63}; 
64 
65CFATTACH_DECL_NEW(cpu_fdt, sizeof(struct cpu_fdt_softc), 
66 cpu_fdt_match, cpu_fdt_attach, NULL, NULL); 61 cpu_fdt_match, cpu_fdt_attach, NULL, NULL);
67 62
68static int 63static int
69cpu_fdt_match(device_t parent, cfdata_t cf, void *aux) 64cpu_fdt_match(device_t parent, cfdata_t cf, void *aux)
70{ 65{
71 struct fdt_attach_args * const faa = aux; 66 struct fdt_attach_args * const faa = aux;
72 const int phandle = faa->faa_phandle; 67 const int phandle = faa->faa_phandle;
73 const char *device_type; 68 const char *device_type;
74 69
75 device_type = fdtbus_get_string(phandle, "device_type"); 70 device_type = fdtbus_get_string(phandle, "device_type");
76 71
77 return device_type != NULL && strcmp(device_type, "cpu") == 0; 72 return device_type != NULL && strcmp(device_type, "cpu") == 0;
78} 73}
79 74
80static void 75static void
81cpu_fdt_attach(device_t parent, device_t self, void *aux) 76cpu_fdt_attach(device_t parent, device_t self, void *aux)
82{ 77{
83 struct cpu_fdt_softc * const sc = device_private(self); 
84 struct fdt_attach_args * const faa = aux; 78 struct fdt_attach_args * const faa = aux;
85 const int phandle = faa->faa_phandle; 79 const int phandle = faa->faa_phandle;
86 bus_addr_t cpuid; 80 bus_addr_t cpuid;
87 const uint32_t *cap_ptr; 81 const uint32_t *cap_ptr;
88 int len; 82 int len;
89 83
90 sc->sc_dev = self; 
91 sc->sc_phandle = phandle; 
92 
93 cap_ptr = fdtbus_get_prop(phandle, "capacity-dmips-mhz", &len); 84 cap_ptr = fdtbus_get_prop(phandle, "capacity-dmips-mhz", &len);
94 if (cap_ptr && len == 4) { 85 if (cap_ptr && len == 4) {
95 prop_dictionary_t dict = device_properties(self); 86 prop_dictionary_t dict = device_properties(self);
96 uint32_t capacity_dmips_mhz = be32toh(*cap_ptr); 87 uint32_t capacity_dmips_mhz = be32toh(*cap_ptr);
97 88
98 prop_dictionary_set_uint32(dict, "capacity_dmips_mhz", 89 prop_dictionary_set_uint32(dict, "capacity_dmips_mhz",
99 capacity_dmips_mhz); 90 capacity_dmips_mhz);
100 } 91 }
101 92
102 if (fdtbus_get_reg(phandle, 0, &cpuid, NULL) != 0) 93 if (fdtbus_get_reg(phandle, 0, &cpuid, NULL) != 0)
103 cpuid = 0; 94 cpuid = 0;
104 95
105 /* Attach the CPU */ 96 /* Attach the CPU */